Cross network bridging
US-12119958-B2 · Oct 15, 2024 · US
Input/output (I/O) expansion response processing in a peripheral component interconnect express (PCIe) environment
US9201830B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9201830-B2 |
| Application number | US-201213674987-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 13, 2012 |
| Priority date | Jun 23, 2010 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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Abstract
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A system for implementing non-standard input/output (I/O) adapters in a standardized I/O architecture, comprising an I/O hub communicatively coupled to an I/O bus and a plurality of I/O adapters, the I/O hub including logic for implementing a method comprising receiving a request from a requester to perform an operation on one of the plurality of I/O adapters. The method further comprising determining that the request is in a format other than a format supported by the I/O bus, determining that the requester requires a completion response for the request, transforming the request into the format supported by the I/O bus, transmitting the request to the I/O adapter, receiving the completion response from the I/O adapter, the completion response comprising an indicator that the request has been completed, the completion response in the format supported by the I/O bus and transmitting the completion response to the requester.
First claim
Opening claim text (preview).
What is claimed is: 1. A system for implementing non-standard input/output (I/O) adapters in a standardized I/O architecture, the system comprising: an I/O adapter communicatively coupled to an I/O hub via an I/O bus, I/O adapter including logic for implementing a method, the method comprising: receiving a request for an operation, the request indicating that a completion response to the request is required, the completion response comprising an address of the I/O adapter and a…
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Physics · mapped topic
Physics · mapped topic
- G06F13/4027Primary
Physics · mapped topic
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- What does patent US9201830B2 cover?
- A system for implementing non-standard input/output (I/O) adapters in a standardized I/O architecture, comprising an I/O hub communicatively coupled to an I/O bus and a plurality of I/O adapters, the I/O hub including logic for implementing a method comprising receiving a request from a requester to perform an operation on one of the plurality of I/O adapters. The method further comprising dete…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification G06F13/4027. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).