Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
US9201784B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9201784-B2 |
| Application number | US-201213728061-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 27, 2012 |
| Priority date | Sep 7, 2012 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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According to embodiments, a controller comprises a write control unit that performs writing in a nonvolatile semiconductor memory, and an area management unit that causes the write control unit to perform write processing until a spare area not storing valid data is not present in the nonvolatile semiconductor memory, and transmits an error to a host when the spare area is not present.
Opening claim text (preview).
What is claimed is: 1. A semiconductor storage device comprising: a nonvolatile semiconductor memory having a plurality of blocks; and a controller configured to calculate a first value indicating amount of data corresponding to addresses which are unwritten in the nonvolatile semiconductor memory among logical addresses contained in a received write instruction from a host, calculate a second value, the second value being derived by adding a third value to the first value,…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Physics · mapped topic
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