Coprocessor Register Renaming
US-2024045680-A1 · Feb 8, 2024 · US
Data processing apparatus and method for performing register renaming for certain data processing operations without additional registers
US9201656B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9201656-B2 |
| Application number | US-201113309719-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 2, 2011 |
| Priority date | Dec 2, 2011 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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Abstract
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The data processing apparatus (and method) has processing circuitry for performing data processing operations in response to data processing instructions, the data processing instructions referencing logical registers. A set of physical registers are provided for storing data values for access by the processing circuitry when performing the data processing operations. Register renaming storage stores a one-to-one mapping between the logical registers and the physical registers, with the register renaming storage being accessed by the processing circuitry when performing the data processing operations in order to map the referenced logical registers to corresponding physical registers. Update circuitry is arranged to identify the physical registers corresponding to those multiple logical registers in the register renaming storage. Altered one-to-one mapping between multiple logical registers and identified physical registers is employed when performing the current data processing operation.
First claim
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We claim: 1. A data processing apparatus comprising: processing circuitry configured to perform data processing operations in response to data processing instructions, said data processing instructions referencing logical registers; a set of physical registers configured to store data values for access by the processing circuitry when performing said data processing operations; register renaming storage configured to store a one-to-one mapping between said logical registers an…
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- G06F9/384Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9201656B2 cover?
- The data processing apparatus (and method) has processing circuitry for performing data processing operations in response to data processing instructions, the data processing instructions referencing logical registers. A set of physical registers are provided for storing data values for access by the processing circuitry when performing the data processing operations. Register renaming storage …
- Who is the assignee on this patent?
- Brelot Jean-Baptiste, Airaud Cédric Denis Robert, Advanced Risc Mach Ltd
- What technology area does this patent fall under?
- Primary CPC classification G06F9/384. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).