Methods and apparatus to validate translated guest code in a dynamic binary translator
US-9223553-B2 · Dec 29, 2015 · US
Just-in-time dynamic translation for translation, compilation, and execution of non-native instructions
US9201635B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9201635-B2 |
| Application number | US-201314143285-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 30, 2013 |
| Priority date | Dec 30, 2013 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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Abstract
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A method for executing non-native instructions in a computing system having a processor configured to execute native instructions may include fetching a first non-native instruction from a plurality of non-native instructions; interpreting the first non-native instruction to generate a first instruction code; compiling the first instruction code to generate a first native instruction corresponding to the first non-native instruction; determining whether to execute the first instruction code or the generated first native instruction; and implementing a first virtual machine instruction corresponding to the first non-native instruction based, at least in part, on determining whether to execute the first instruction code or the first native instruction.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for executing non-native instructions in a computing system having a processor configured to execute native instructions, comprising: fetching a first non-native instruction from a plurality of non-native instructions; interpreting the first non-native instruction to generate a first instruction code; compiling the first instruction code to generate a first native instruction corresponding to the first non-native instruction; determining, by t…
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- G06F9/4552Primary
Physics · mapped topic
Physics · mapped topic
- G06F8/41Primary
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9201635B2 cover?
- A method for executing non-native instructions in a computing system having a processor configured to execute native instructions may include fetching a first non-native instruction from a plurality of non-native instructions; interpreting the first non-native instruction to generate a first instruction code; compiling the first instruction code to generate a first native instruction correspond…
- Who is the assignee on this patent?
- Jennings Andrew T, Caldarale Charles R, Harris Kevin, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification G06F9/4552. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).