Memory device with data scrubbing capability and methods
US-2024393961-A1 · Nov 28, 2024 · US
Interface control apparatus, data storage apparatus and interface control method
US9201611B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9201611-B2 |
| Application number | US-201314022431-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 10, 2013 |
| Priority date | Apr 19, 2013 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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Abstract
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According to one embodiment, an interface control apparatus includes an interface, a table, a command processor, and a controller. The interface transmits and receives information to and from a host. The table holds management information for managing an address in a memory space in the host. The command processor carries out a command process of accessing the memory space in the host using the management information. The controller releases the management information corresponding to the command process from the table in response to completion of the command process.
First claim
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What is claimed is: 1. An apparatus for interface control comprising: an interface configured to transmit and receive information to and from a host; a table configured to hold management information for managing an address in a memory space in the host; a command processor configured to carry out a command process of accessing the memory space in the host using the management information; and a first controller configured to release the management information corresponding…
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- G06F3/0659Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9201611B2 cover?
- According to one embodiment, an interface control apparatus includes an interface, a table, a command processor, and a controller. The interface transmits and receives information to and from a host. The table holds management information for managing an address in a memory space in the host. The command processor carries out a command process of accessing the memory space in the host using the…
- Who is the assignee on this patent?
- Toshiba Kk
- What technology area does this patent fall under?
- Primary CPC classification G06F3/0659. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).