Frame rate conversion apparatus for 3D display and associated method

US9197876B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9197876-B2
Application numberUS-86883110-A
CountryUS
Kind codeB2
Filing dateAug 26, 2010
Priority dateAug 27, 2009
Publication dateNov 24, 2015
Grant dateNov 24, 2015

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Abstract

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A frame rate conversion apparatus for 3D display is provided. The frame rate conversion apparatus for 3D display is capable of preserving alternate display of left and right frames while also preventing an issue of frame tearing. The frame rate conversion apparatus includes a storage unit, an input controller and an output controller. The input controller inputs an input frame sequence to the storage unit according to an input frame rate. The input frame sequence includes a plurality of frame pairs each having a left frame and a corresponding right frame. The output controller alternately outputs one of the left frames and one of the right frames from the storage unit according to an output frame rate and left/right frame information associated with the frame pairs in the storage unit to form an output frame sequence.

First claim

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What is claimed is: 1. A frame rate conversion apparatus for three-dimensional (3D) stereo display, comprising: a storage unit; an input controller, for inputting an input frame sequence to the storage unit according to an input frame rate, the input frame sequence comprising a plurality of frame pairs each having a left frame and a corresponding right frame; and an output controller, for alternately outputting one of the left frames and one of the right frames from the storag…

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What does patent US9197876B2 cover?
A frame rate conversion apparatus for 3D display is provided. The frame rate conversion apparatus for 3D display is capable of preserving alternate display of left and right frames while also preventing an issue of frame tearing. The frame rate conversion apparatus includes a storage unit, an input controller and an output controller. The input controller inputs an input frame sequence to the s…
Who is the assignee on this patent?
Cheng Kun-Nan, Huang Chit-Keng, Liao Yi-Chung, and 1 more
What technology area does this patent fall under?
Primary CPC classification H04N13/167. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).