Vertical 3D memory device and accessing method
US-11877457-B2 · Jan 16, 2024 · US
US9196831B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9196831-B2 |
| Application number | US-201314108160-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 16, 2013 |
| Priority date | Mar 14, 2013 |
| Publication date | Nov 24, 2015 |
| Grant date | Nov 24, 2015 |
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Providing for two-terminal memory having an inherent rectifying characteristic(s) is described herein. By way of example, the two-terminal memory can be a resistive switching device having one or more “on” states and an “off” state, to facilitate storage of digital information. A conductive filament can be electrically isolated from an electrode of the two-terminal memory by a thin tunneling layer, which permits a tunneling current for voltages greater in magnitude than a positive rectifying voltage or a negative rectifying voltage. The two-terminal memory cell can therefore have high resistance to small voltages, mitigating leakage currents in an array of the two-terminal memory cells. In addition, the memory cell can be conductive above a rectifying voltage, enabling reading of the memory cell in response to a suitable read bias, and erasing of the memory cell in response to a suitable negative erase bias.
Opening claim text (preview).
What is claimed is: 1. A memory cell, comprising: a bottom electrode; a top electrode comprising a material that is electrically conductive and configured to provide ions of the material under applied bias; a switching layer comprising a second material, and that is formed as a non-stoichiometric amorphous structure that is electrically resistive and at least in part permeable to the ions of the material of the top electrode, wherein a subset of the ions migrate into the switc…
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