Resistive memory and fabricating method thereof

US9196828B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9196828-B2
Application numberUS-201313849422-A
CountryUS
Kind codeB2
Filing dateMar 22, 2013
Priority dateJun 25, 2012
Publication dateNov 24, 2015
Grant dateNov 24, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to the first electrode. The variable resistance material layer includes a sidewall and first and second surfaces opposite to each other, wherein the first surface is connected with the first portion of the first electrode and the second surface is electrically connected with the second electrode. The second portion surrounds the sidewall of the variable resistance material layer and is connected with the first portion. The first dielectric layer is disposed between the first and the second electrodes. The second dielectric layer is disposed between the variable resistance material layer and the second portion of the first electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A resistive memory, comprising: a first electrode having a first portion and a second portion; a second electrode disposed opposite to the first electrode; a variable resistance material layer having a sidewall, a first surface, and a second surface opposite to the first surface, wherein the first surface of the variable resistance material layer is connected with the first portion of the first electrode, the second surface of the variable resistance ma…

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What does patent US9196828B2 cover?
A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to the first electrode. The variable resistance material layer inclu…
Who is the assignee on this patent?
Macronix Int Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L45/1253. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).