Optoelectronic component and method for producing same
US-12176444-B2 · Dec 24, 2024 · US
Optical device package having a groove in the metal layer
US9196811B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9196811-B2 |
| Application number | US-201214236016-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 27, 2012 |
| Priority date | Jul 29, 2011 |
| Publication date | Nov 24, 2015 |
| Grant date | Nov 24, 2015 |
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Abstract
Official abstract text for this publication.
Provided are an optical device package and a method of manufacturing the same. The method of manufacturing the optical device package according to an exemplary embodiment of the present invention comprises: forming a metal layer on an insulating layer on which via holes are formed; forming a circuit pattern layer by etching the metal layer; forming a boundary part in a predetermined part of the metal layer; mounting an optical device on the circuit pattern layer; and forming a molding part by applying a transparent material to the optical device, wherein the predetermined part is a part corresponding to a boundary of the molding part.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method of manufacturing an optical device package comprising: forming a metal layer on an insulating layer on which via holes are included; forming a circuit pattern layer by etching the metal layer; forming a boundary part in a predetermined part of the metal layer; mounting an optical device on the circuit pattern layer; and forming a molding part by applying a transparent material to the optical device, wherein the predetermined part is…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9196811B2 cover?
- Provided are an optical device package and a method of manufacturing the same. The method of manufacturing the optical device package according to an exemplary embodiment of the present invention comprises: forming a metal layer on an insulating layer on which via holes are formed; forming a circuit pattern layer by etching the metal layer; forming a boundary part in a predetermined part of the…
- Who is the assignee on this patent?
- Paik Jee Heum, Cho Sang Ki, Lg Innotek Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10H20/853. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).