Adaptive equalizer

Patent metadata

Field	Value
Publication number	US-9191253-B2
Application number	US-201214239923-A
Country	US
Kind code	B2
Filing date	Jun 29, 2012
Priority date	Oct 17, 2011
Publication date	Nov 17, 2015
Grant date	Nov 17, 2015

Abstract

An adaptive equalizer ( 100 ) has a signal converter ( 200 ) for performing a fast Fourier transform and/or an inverse fast Fourier transform. The signal converter ( 200 ) has: a first wide-bit memory ( 201 ) capable of reading/writing a plurality of sample signals; a first register group ( 202 ) comprising a plurality of registers capable of accessing the first wide-bit memory ( 201 ); a butterfly computation unit group ( 204 ) comprising a plurality of butterfly computation units; and a first connection switching unit ( 203 ) for switching the state of connection between the plurality of registers and the plurality of butterfly computation units.

First claim

The invention claimed is:

1. An adaptive equalizer that performs adaptive equalization on a time-domain signal in a frequency domain, comprising a signal conversion section that performs at least one of a fast Fourier transform and an inverse fast Fourier transform, wherein the signal conversion section includes:
a memory capable of reading and writing signals for 2M samples, where M is a natural number;
2M registers accessible to the memory;
M butterfly operation sections; and
a switching control section that switches a connection state between the 2M registers and the M butterfly operation sections, wherein:
the signal conversion section includes two pairs of the memory and the 2M registers; and
the switching control section switches a connection state (i) between the 2M registers in one of the two pairs and the M butterfly operation sections and (ii) between the 2M registers in the other of the two pairs and the M butterfly operation sections, such that a role of the memory is switched between a memory for output and a memory for input for each stage of the fast Fourier transform and the inverse fast Fourier transform.

2. The adaptive equalizer according to claim 1 , further comprising:
a first signal conversion section as the signal conversion section that performs the fast Fourier transform; and
a second signal conversion section as the signal conversion section that performs the inverse fast Fourier transform on a signal on which the fast Fourier transform is performed by the first signal conversion section, wherein:
the first signal conversion section does not perform a bit-reversal permutation in the fast Fourier transform; and
the second signal conversion section does not perform a bit-reversal permutation in the inverse fast Fourier transform.

3. The adaptive equalizer according to claim 1 , wherein the signal conversion section further includes:
a twiddle-factor memory that stores twiddle factors in each stage of the fast Fourier transform and the inverse fast Fourier transform, and that is capable of reading signals for M samples; and
M twiddle-factor registers that are accessible to the twiddle-factor memory, and that obtains the twiddle factors and passes the twiddle factors to the M butterfly operation sections.

4. The adaptive equalizer according to claim 1 , wherein:
the adaptive equalizer is provided in a reception apparatus including a multi-carrier demodulation section; and
the memory is used in common with a memory in the multi-carrier demodulation section.

5. The adaptive equalizer according to claim 4 , further comprising:
an input/output section that includes an address conversion section, a serial/parallel conversion section, and a parallel/serial conversion section, and controls input and output of signals to and from the memory; and
a control section that switches configuration of the input/output section depending on whether a method for accessing the memory is random or sequential.

6. The adaptive equalizer according to claim 5 , wherein in a writing mode when the method for accessing the memory is random, the input/output section reads data for 2M samples from the memory before writing the data and overwrites the data only on a predetermined location of the memory.

7. An adaptive equalizer that performs adaptive equalization on a time-domain signal in a frequency domain, comprising:
a signal conversion section that performs at least one of a fast Fourier transform and an inverse fast Fourier transform, wherein the signal conversion section includes:
a memory capable of reading and writing signals for 2M samples, where M is a natural number;
2M registers accessible to the memory;
M butterfly operation sections; and
a switching control section that switches a connection state between the 2M registers and the M butterfly operation sections;

an accumulation section that receives input of a signal in the time domain and sequentially accumulates the signals for a predetermined block size;
an inter-block concatenating section that concatenates a block accumulated last time and a newest block;
a first fast Fourier transform section as the signal conversion section that performs the fast Fourier transform on output from the inter-block connecting section;
a first multiplier that multiplies output from the first fast Fourier transform section and a coefficient for adaptive equalizer converted into the frequency domain;
a first inverse fast Fourier transform section as the signal conversion section that performs the inverse fast Fourier transform on output from the first multiplier;
a block extracting section that extracts a newest block of signal series from the output from the first inverse fast Fourier transform section;
an error extracting section that extracts an error from output from the first inverse fast Fourier transform section to an ideal signal point;
a first zero padding section that pads zero to a series of the error extracted, except for a part denoting desired tap coefficients;
a second fast Fourier transform section as the signal conversion section that performs the fast Fourier transform on output from the first zero padding section;
a second multiplier that multiplies complex conjugation of output from the first fast Fourier transform section and output from the second fast Fourier transform section;
a second inverse fast Fourier transform section as the signal processing section that performs inverse fast Fourier transform on a multiplication result of the second multiplier;
a second zero padding section that pads zero to output from the second inverse fast Fourier transform section, except for a part denoting desired tap coefficients;
a third fast Fourier transform section as the signal processing section that performs the fast Fourier transform on output from the second zero padding section;
a third multiplier that multiplies output from the third fast Fourier transform section and a predetermined coefficient; and
an accumulation section that accumulates output from the third multiplier.

8. The adaptive equalizer according to claim 7 , further comprising a time-domain filter section that performs decision-feedback equalization on output from the first inverse fast Fourier transform section, wherein
at least one of the registers in the first to third fast Fourier transform section and the first and second inverse fast Fourier transform section is used in common with a register in the time-domain filter section.

9. The adaptive equalizer according to claim 7 , further comprising a time-domain filter section that performs decision-feedback equalization on at least the output from the first inverse fast Fourier transform section of a main wave, using a filtering coefficient updated in a frequency shorter than the block size.

10. The adaptive equalizer according to claim 7 , further comprising a time-domain filter section that performs decision-feedback equalization on output from the first inverse fast Fourier transform section, wherein
at least one of multipliers used for butterfly operation sections in the first to third fast Fourier transform sections and the first and second inverse fast Fourier transform sections is used in common with a multiplier for convolution operation by the time-domain filter section.

11. The adaptive equalizer according to claim 7 , wherein at least one of multipliers used for butterfly operation sections in the first to third fast Fourier transform sections and the first and second inverse fast Fourier transform sections is used in common with a multiplier for the first to third multipliers.

Assignees

• Yomo Hidekuni
• Matsuoka Akihiko
• Maruyama Atsushi
• Panasonic Ip Man Co Ltd

Inventors

• Yomo Hidekuni
• Matsuoka Akihiko
• Maruyama Atsushi

Classifications

• H04L2025/03414

  Multicarrier · CPC title

• G06F17/142

  Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm · CPC title

• H04L27/01 Primary

  Equalisers {(baseband equalizers at the transmitter end H04L25/03343; in analogue transmission systems H04B3/04, H04B7/005)} · CPC title

• H04L25/03159 Primary

  operating in the frequency domain (H04L25/03165, H04L25/03178 take precedence) · CPC title

• H04L25/03057

  with a recursive structure (H04L25/03031 takes precedence) · CPC title