Display Substrate, Display Substrate Motherboard and Display Apparatus
US-2024355831-A1 · Oct 24, 2024 · US
Multi-chip package
US9190366B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9190366-B2 |
| Application number | US-201213727008-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 26, 2012 |
| Priority date | Dec 27, 2011 |
| Publication date | Nov 17, 2015 |
| Grant date | Nov 17, 2015 |
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Abstract
Official abstract text for this publication.
A multi-chip package includes a single lead and a plurality of inner package chips. Each of the plurality of inner package chips includes at least one pad circuit and an internal circuit. The pad circuit is selectively coupled to the lead and configured to provide a chip address signal corresponding to a connection state to the lead. The inner package chip receives the chip address signal to identify a corresponding inner package chip.
First claim
Opening claim text (preview).
What is claimed is: 1. A multi-chip package comprising: a single lead; and a plurality of inner package chips, wherein each of the plurality of inner package chips comprises: at least one pad circuit selectively coupled to the lead and configured to provide a chip address signal corresponding to a connection state to the lead; and an internal circuit configured to receive the chip address signal to identify a corresponding inner package chip. 2. The…
Assignees
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Classifications
Electricity · mapped topic
Electricity · mapped topic
- H10W42/60Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9190366B2 cover?
- A multi-chip package includes a single lead and a plurality of inner package chips. Each of the plurality of inner package chips includes at least one pad circuit and an internal circuit. The pad circuit is selectively coupled to the lead and configured to provide a chip address signal corresponding to a connection state to the lead. The inner package chip receives the chip address signal to id…
- Who is the assignee on this patent?
- Sk Hynix Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W42/60. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).