Techniques for transferring time information between clock domains
US-9001951-B1 · Apr 7, 2015 · US
Multimode base station and implementation method thereof
US9178689B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178689-B2 |
| Application number | US-201414581033-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 23, 2014 |
| Priority date | Jun 28, 2012 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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Abstract
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The present invention relates to a method includes: implementing, by the board in the BBU1, frequency synchronization between a system clock of the board in the BBU1 and a system clock of the board in the BBU0 by using a synchronous Ethernet clock that is output by the board in the BBU0; and implementing, by the board in the BBU1, time synchronization between the system clock of the board in the BBU1 and the system clock of the board in the BBU0 by using an IEEE1588 clock that is output by the board in the BBU0. The present invention can enable the multimode base station to support more standards.
First claim
Opening claim text (preview).
What is claimed is: 1. An implementation method of a multimode base station, wherein the multimode base station is at least integrated with a first baseband unit BBU0 and a second base band unit BBU1, wherein a board of at least one standard is overlaid in the BBU0 and the BBU1 each; and the board in the BBU0 and the board in the BBU1 each are connected to a common-mode radio frequency module through a communication interface, the method comprising: implementing, by a board in the…
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Classifications
Electricity · mapped topic
- H04B1/406Primary
Electricity · mapped topic
Electricity · mapped topic
- H04L7/0331Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9178689B2 cover?
- The present invention relates to a method includes: implementing, by the board in the BBU1, frequency synchronization between a system clock of the board in the BBU1 and a system clock of the board in the BBU0 by using a synchronous Ethernet clock that is output by the board in the BBU0; and implementing, by the board in the BBU1, time synchronization between the system clock of the board in th…
- Who is the assignee on this patent?
- Huawei Tech Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H04B1/406. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).