Shifter implemented circulant permutation matrix operations
US-2024386072-A1 · Nov 21, 2024 · US
US9178659B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178659-B2 |
| Application number | US-201013254464-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 25, 2010 |
| Priority date | Mar 19, 2009 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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A method ( 400 ) and apparatus for encoding a block-based communication system header. A physical (PHY) layer header and a medium access control (MAC) header of the block-based communication system header are encoded to generate parity bits, wherein the PHY layer header includes at least cyclic prefix (CP) mode bits (S 410 ). Parity bits are appended to the PHY layer header and the MAC layer header to generate a bit vector (S 420 ). The bit vector is divided into at least two data blocks, wherein a first data block includes at least the CP mode bits (S 430 ). A predefined number of tail bits are appended to each data block (S 440 ). The two data blocks are mapped into at least two symbols, wherein the first data block is mapped to a first symbol, such that the first symbol is a first header symbol being transmitted (S 450 ).
Opening claim text (preview).
What is claimed is: 1. A method for encoding a block-based communication system header, comprising: encoding a physical (PHY) layer header and a medium access control (MAC) header of the block-based communication system header to generate parity bits by using a systematic error correcting code, wherein the PHY layer header includes at least cyclic prefix (CP) mode bits, wherein said CP mode bits define a time duration of a guard interval; appending the parity bits to the PHY layer header and the MAC layer header to generate a bit vector; dividing the bit vector equally into first and second data blocks, wherein the first data block includes at least the CP mode bits; appending a predefined number of tail bits to each data block of the first and second data blocks; and mapping the first and second data blocks into at least two symbols, wherein the first data block is mapped to a first symbol, and wherein the first symbol is to be transmitted before the second symbol. 2. The method of claim 1 , wherein the block-based communication system header is at least a physical layer convergence protocol (PLCP) header. 3. The method of claim 1 , wherein the encoding is a systematic Reed-Solomon (RS) encoding. 4. The method of claim 1 , wherein the CP mode bits are the first bits in the PHY layer header. 5. The method of claim 4 , further comprising deriving, at a receiver, the time duration of the guard interval directly from the first header block without performing RS decoding on the first header block. 6. The method of claim 4 , further comprising encoding the CP mode bits using a block code prior to the encoding of the headers. 7. The method of claim 1 , further comprising encoding the first and second data blocks using at least a rate-1/2 convolutional code prior to said mapping. 8. The method of claim 7 , wherein the encoding of said first and second data blocks further comprises modulating the data blocks to constellation points using a constellation based scheme. 9. An apparatus for encoding a block-based communication system header, comprising: a block encoding unit for encoding cyclic prefix (CP) mode bits using a block code, wherein said CP mode bits define a time duration of a guard interval; a systematic Reed-Solomon (RS) encoder for encoding a physical (PHY) layer header and a medium access control (MAC) layer header to generate parity bits, wherein the PHY layer header includes at least the block coded CP mode bits; a vector splitter for dividing an output of the systematic RS encoder equally into first and second data blocks and appending a predefined number of tail bits to each data block, wherein the first data block includes at least the CP mode bits; and a mapper for mapping the first and second data blocks into at least two symbols, wherein the first data block is mapped to a first symbol, and wherein the first symbol is to be transmitted before the second symbol. 10. The apparatus of claim 9 , wherein the CP mode bits are the first bits in the PHY layer header. 11. The apparatus of claim 9 , wherein the block-based communication system header is at least a physical layer convergence protocol (PLCP) header. 12. The apparatus of claim 9 , further comprising an encoder for encoding the at least first and second data blocks using at least a rate-1/2 convolutional code before the data blocks are mapped by the mapper.
Block codes (H04L1/0061, H04L1/0064 take precedence) · CPC title
Cyclic extensions · CPC title
Serial concatenated codes · CPC title
Error control for data other than payload data, e.g. control data · CPC title
Convolutional codes · CPC title
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