Oscillation circuit, voltage controlled oscillator, and serial data receiver
US-2016344378-A1 · Nov 24, 2016 · US
Reconfigurable multi-path injection locked oscillator
US9178498B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178498-B2 |
| Application number | US-201314045052-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 3, 2013 |
| Priority date | Oct 3, 2013 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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Abstract
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A ring oscillator comprising three or more delay cells, each of which comprises a plurality of differential input leads and a differential output lead, wherein each of the plurality of differential input leads comprises one or more inverters, wherein the three or more delay cells are inter-connected forming a plurality of loop paths, wherein each loop path connects the differential output lead of each delay cell to a corresponding differential input lead of another delay cell, wherein each loop path provides an inverter strength determined by a number of inverters in a corresponding differential input lead of each delay cell, wherein the plurality of loop paths are configured to generate an oscillating signal with an operating frequency, and wherein the operating frequency is tunable by digitally adjusting one or more inverter strengths in one or more of the plurality of loop paths.
First claim
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What is claimed is: 1. A ring oscillator comprising: three or more delay cells, each of which comprises a plurality of differential input leads and a differential output lead, wherein each of the plurality of differential input leads comprises one or more inverters, wherein the three or more delay cells are inter-connected forming a plurality of loop paths, wherein each loop path connects the differential output lead of each delay cell to a corresponding differential input lead…
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- H03K3/0322Primary
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9178498B2 cover?
- A ring oscillator comprising three or more delay cells, each of which comprises a plurality of differential input leads and a differential output lead, wherein each of the plurality of differential input leads comprises one or more inverters, wherein the three or more delay cells are inter-connected forming a plurality of loop paths, wherein each loop path connects the differential output lead …
- Who is the assignee on this patent?
- Futurewei Technologies Inc, Futurwei Technologies Inc
- What technology area does this patent fall under?
- Primary CPC classification H03K3/0322. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).