Transmit (tx) receive (rx) phased array system
US-2024322795-A1 · Sep 26, 2024 · US
US9178488B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178488-B2 |
| Application number | US-201213426575-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 21, 2012 |
| Priority date | Mar 21, 2011 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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Systems and methods for direct load impedance computation for a two-port network are disclosed. For a two-port network connected between a first port and a second port, a method can include defining an equivalent PI network including a first equivalent network element in communication with the first port, a second equivalent network element in communication with the second port, and a third equivalent network element connected between the first port and the second port. A linear passive load can be connected to the second port of the two-port network, currents through the linear passive load, the second equivalent network element, and the third equivalent network element can be measured, and a load impedance of the linear passive load can be determined based on predetermined values of a voltage at the first port and a voltage at the second port.
Opening claim text (preview).
What is claimed is: 1. A method for direct load impedance determination for a two-port network comprising: connecting the two-port network between a first port and a second port; determining component values for an equivalent PI network that models a linear two-port response of the two-port network, the equivalent PI network comprising a first equivalent network element in communication with the first port and having a first admittance to ground, a second equivalent network elem…
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