Push-pull rf power amplifier circuit and push-pull rf power amplifier
US-2024429886-A1 · Dec 26, 2024 · US
Envelope detector with enhanced linear range
US9178476B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178476-B2 |
| Application number | US-201213627099-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 26, 2012 |
| Priority date | Sep 26, 2012 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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Abstract
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An envelope detector (ED) includes a voltage-mode ED core including parallel detection transistors for detecting a voltage envelope of an RF signal input. The detection transistors are configured with a size and for a current such that the transistors are biased in subthreshold regions of operation. The ED core is configured to variably control a bias current through the detection transistors, where the bias current is varied according to a voltage amplitude of the RF signal input to enhance a linear range of the ED while detection transistors continue to operate in subthreshold regions. A linearizer circuit may be configured to control the bias current based on feedback inputs from ED outputs. Several gain-programmable voltage amplifiers, which may include a final specialized class-AB amplifier, precede the ED core, to adapt a transmitter output voltage to an input range of the ED core, which extends the linear range of the ED.
First claim
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What is claimed is: 1. An envelope detector comprising: a voltage-mode envelope detector (ED) core including parallel detection transistors for detecting a voltage envelope of a radio frequency (RF) signal input; where the detection transistors are configured to be biased in a subthreshold region of operation; where the ED core is configured to variably control a bias current through the detection transistors, where the bias current is varied according to a differential output…
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- What does patent US9178476B2 cover?
- An envelope detector (ED) includes a voltage-mode ED core including parallel detection transistors for detecting a voltage envelope of an RF signal input. The detection transistors are configured with a size and for a current such that the transistors are biased in subthreshold regions of operation. The ED core is configured to variably control a bias current through the detection transistors, …
- Who is the assignee on this patent?
- Broadcom Corp
- What technology area does this patent fall under?
- Primary CPC classification H03F3/245. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).