Semiconductor device
US-2024321938-A1 · Sep 26, 2024 · US
Adsorption site blocking method for co-doping ALD films
US9178010B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178010-B2 |
| Application number | US-201213693901-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 4, 2012 |
| Priority date | Nov 11, 2011 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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Abstract
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A method for doping a dielectric material by pulsing a first dopant precursor, purging the non-adsorbed precursor, pulsing a second precursor, purging the non-adsorbed precursor, and pulsing a oxidant to form an intermixed layer of two (or more) metal oxide dielectric dopant materials. The method may also be used to form a blocking layer between a bulk dielectric layer and a second electrode layer. The method improves the control of the composition and the control of the uniformity of the dopants throughout the thickness of the doped dielectric material.
First claim
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What is claimed: 1. A semiconductor layer stack comprising: a first layer formed on a substrate, wherein the first layer is operable as a first electrode, wherein the first layer comprises crystalline MoO 2 ; a second layer formed on the first layer, wherein the second layer comprises a doped high k dielectric material, wherein the doped high k dielectric material is TiO 2 doped with at least two of Al, Ce, Co, Ga, Gd, Ge, Hf, In, La, Lu, Mg, Mn, Nd, Pr, Sc, Si, Sn, Sr,…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9178010B2 cover?
- A method for doping a dielectric material by pulsing a first dopant precursor, purging the non-adsorbed precursor, pulsing a second precursor, purging the non-adsorbed precursor, and pulsing a oxidant to form an intermixed layer of two (or more) metal oxide dielectric dopant materials. The method may also be used to form a blocking layer between a bulk dielectric layer and a second electrode la…
- Who is the assignee on this patent?
- Intermolecular Inc, Elpida Memory Inc
- What technology area does this patent fall under?
- Primary CPC classification H10D1/68. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).