Multi-chip light emitter packages and related methods

US9172012B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9172012-B2
Application numberUS-201313796045-A
CountryUS
Kind codeB2
Filing dateMar 12, 2013
Priority dateOct 31, 2007
Publication dateOct 27, 2015
Grant dateOct 27, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Light emitter packages having multiple light emitter chips, such as light emitting diode (LED) chips, and related methods are provided. In one embodiment, a light emitter package can include a ceramic submount. An array of light emitter chips can be disposed over a portion of the submount, and each light emitter chip can include a horizontal chip structure having positive and negative electrical contacts disposed on a same side. The positive and negative electrical contacts can be adapted to electrically communicate to conductive portions of the submount. Light emitter packages can further include a lens overmolded on the submount and covering a portion of the array.

First claim

Opening claim text (preview).

We claim: 1. A method of providing a light emitter package, the method comprising: providing a submount having a planar upper surface; providing an array of light emitter chips disposed over a portion of the planar upper surface of the submount in a rectangular arrangement; connecting each light emitter chip of the array of light emitter chips to conductive portions of the submount via non-wire bond connections; and providing a lens over the array of light emitter chips, whe…

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What does patent US9172012B2 cover?
Light emitter packages having multiple light emitter chips, such as light emitting diode (LED) chips, and related methods are provided. In one embodiment, a light emitter package can include a ceramic submount. An array of light emitter chips can be disposed over a portion of the submount, and each light emitter chip can include a horizontal chip structure having positive and negative electrica…
Who is the assignee on this patent?
Cree Inc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).