High efficiency on-chip 3D transformer structure

US9171663B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9171663-B2
Application numberUS-201313950947-A
CountryUS
Kind codeB2
Filing dateJul 25, 2013
Priority dateJul 25, 2013
Publication dateOct 27, 2015
Grant dateOct 27, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An integrated circuit transformer structure includes at least two conductor groups stacked in parallel in different layers. A first spiral track is formed in the at least two conductor groups, the first spiral track includes first turns of a first radius within each of the at least two conductor groups, and second turns of a second radius within each of the at least two conductor groups, the first and second turns being electrically connected. A second spiral track is formed in the at least two conductor groups, the second spiral track including a plurality of adjacent turns of one or more radii within each of the at least two conductor groups and disposed in a same plane between the first and second turns in each of the at least two conductor groups.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit transformer structure, comprising: at least two conductor groups stacked in parallel in different layers; a first spiral track formed in the at least two conductor groups, the first spiral track including: first turns of a first radius within each of the at least two conductor groups, and second turns of a second radius within each of the at least two conductor groups, the first and second turns being electrically connected; and…

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What does patent US9171663B2 cover?
An integrated circuit transformer structure includes at least two conductor groups stacked in parallel in different layers. A first spiral track is formed in the at least two conductor groups, the first spiral track includes first turns of a first radius within each of the at least two conductor groups, and second turns of a second radius within each of the at least two conductor groups, the fi…
Who is the assignee on this patent?
IBM, Globalfoundries Us 2 Llc
What technology area does this patent fall under?
Primary CPC classification H01F27/2804. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).