Self calibration method for radio equipment with receive and transmit circuitry
US-9031514-B2 · May 12, 2015 · US
System and method for testing a radio frequency integrated circuit
US9166706B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9166706-B2 |
| Application number | US-201414198059-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 5, 2014 |
| Priority date | Nov 23, 2010 |
| Publication date | Oct 20, 2015 |
| Grant date | Oct 20, 2015 |
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Abstract
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In an embodiment, a method of testing a radio frequency integrated circuit (RFIC) includes generating high frequency test signals using the on-chip test circuit, measuring signal levels using on-chip power detectors, and controlling and monitoring the on-chip test circuit using low frequency signals. The RFIC circuit is configured to operate at high frequencies, and an on-chip test circuit that includes frequency generation circuitry configured to operate during test modes.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of testing a radio frequency integrated circuit (RFIC) circuit comprising an RF circuit configured to operate at high frequencies, and an on-chip test circuit comprising frequency generation circuitry configured to operate during test modes, the method comprising: generating high frequency test signals using the on-chip test circuit; measuring signal levels using on-chip power detectors; and controlling and monitoring the on-chip test circuit us…
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Physics · mapped topic
- G01R31/2822Primary
Physics · mapped topic
- H04B17/00Primary
Electricity · mapped topic
- G01R31/28Primary
Physics · mapped topic
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- What does patent US9166706B2 cover?
- In an embodiment, a method of testing a radio frequency integrated circuit (RFIC) includes generating high frequency test signals using the on-chip test circuit, measuring signal levels using on-chip power detectors, and controlling and monitoring the on-chip test circuit using low frequency signals. The RFIC circuit is configured to operate at high frequencies, and an on-chip test circuit that…
- Who is the assignee on this patent?
- Infineon Technologies Ag
- What technology area does this patent fall under?
- Primary CPC classification G01R31/2822. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Oct 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).