MTJ stack and bottom electrode patterning process with ion beam etching using a single mask

Patent metadata

Field	Value
Publication number	US-9166154-B2
Application number	US-201314096016-A
Country	US
Kind code	B2
Filing date	Dec 4, 2013
Priority date	Dec 7, 2012
Publication date	Oct 20, 2015
Grant date	Oct 20, 2015

Abstract

Fabrication methods using Ion Beam Etching (IBE) for MRAM cell memory elements are described. In embodiments of the invention the top electrode and MTJ main body are etched with one mask using reactive etching such as RIE or magnetized inductively coupled plasma (MICP) for improved selectivity, then the bottom electrode is etched using IBE as specified in various alternative embodiments which include selection of incident angles, wafer rotational rate profiles and optional passivation layer deposited prior to the IBE. The IBE according to the invention etches the bottom electrode without the need for an additional mask by using the layer stack created by the first etching phase as the mask. This makes the bottom electrode self-aligned to MTJ. The IBE also achieves MTJ sidewall cleaning without the need for an additional step.

First claim

The invention claimed is:

1. A method of fabricating an array of memory pillars on a wafer using a single mask, the method comprising:
depositing a stack of layers for the array of memory pillars including a top electrode layer and a bottom electrode layer with magnetic tunnel junction (MTJ) layers interposed therebetween, the MTJ layers further comprising a top magnetic layer and a bottom magnetic layer with a barrier layer interposed therebetween;
executing a first etching pr…

Assignees

• Avalanche Technology Inc
• Avalance Technology Inc

Inventors

• Satoh Kimihiro
• Jung Dong Ha
• Zhang Jing
• Chen Benjamin
• Huai Yiming
• Ranjan Rajiv Yadav
• Zhou Yuchen

Classifications

• H01L43/12 Primary

  Electricity · mapped topic

• H10N50/01 Primary

  Electricity · mapped topic