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US-2024414942-A1 · Dec 12, 2024 · US
Semiconductor device and method of manufacturing the same
US9166019B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9166019-B2 |
| Application number | US-201414151036-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 9, 2014 |
| Priority date | Oct 13, 2011 |
| Publication date | Oct 20, 2015 |
| Grant date | Oct 20, 2015 |
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Abstract
Official abstract text for this publication.
A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a semiconductor device comprising the steps of: forming a first electrode layer and a second electrode layer; forming an oxide semiconductor layer over the first electrode layer and the second electrode layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer and a first insulating layer over the gate insulating layer to overlap with the oxide semiconductor layer; introducing…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
- H10D30/6755Primary
Electricity · mapped topic
- H10D30/6729Primary
Electricity · mapped topic
- H10D30/021Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9166019B2 cover?
- A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are s…
- Who is the assignee on this patent?
- Semiconductor Energy Lab
- What technology area does this patent fall under?
- Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Oct 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).