Semiconductor devices and methods of manufacturing thereof
US-2024105795-A1 · Mar 28, 2024 · US
US9166014B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9166014-B2 |
| Application number | US-201313911669-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 6, 2013 |
| Priority date | Jun 6, 2013 |
| Publication date | Oct 20, 2015 |
| Grant date | Oct 20, 2015 |
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A gate structure is provided on a channel portion of a semiconductor substrate. The gate structure may include an electrically conducting layer present on a gate dielectric layer, a semiconductor-containing layer present on the electrically conducting layer, a metal semiconductor alloy layer present on the semiconductor-containing layer, and a dielectric capping layer overlaying the metal semiconductor alloy layer. In some embodiments, carbon and/or nitrogen can be present within the semiconductor-containing layer, the metal semiconductor alloy layer or both the semiconductor-containing layer and the metal semiconductor alloy layer. The presence of carbon and/or nitrogen within the semiconductor-containing layer and/or the metal semiconductor alloy layer provides stability to the gate structure. In another embodiment, a layer of carbon and/or nitrogen can be formed between the semiconductor-containing layer and the metal semiconductor alloy layer.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a gate structure present on a channel portion of a semiconductor substrate, wherein the gate structure comprises: a gate dielectric layer overlaying said channel portion of the semiconductor substrate, an electrically conducting layer present directly on a topmost surface of the gate dielectric layer, said electrically conducing layer comprises at least one metal that provides a threshold voltage shift to said gate struc…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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