Gate electrode with stabilized metal semiconductor alloy-semiconductor stack

US9166014B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9166014-B2
Application numberUS-201313911669-A
CountryUS
Kind codeB2
Filing dateJun 6, 2013
Priority dateJun 6, 2013
Publication dateOct 20, 2015
Grant dateOct 20, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A gate structure is provided on a channel portion of a semiconductor substrate. The gate structure may include an electrically conducting layer present on a gate dielectric layer, a semiconductor-containing layer present on the electrically conducting layer, a metal semiconductor alloy layer present on the semiconductor-containing layer, and a dielectric capping layer overlaying the metal semiconductor alloy layer. In some embodiments, carbon and/or nitrogen can be present within the semiconductor-containing layer, the metal semiconductor alloy layer or both the semiconductor-containing layer and the metal semiconductor alloy layer. The presence of carbon and/or nitrogen within the semiconductor-containing layer and/or the metal semiconductor alloy layer provides stability to the gate structure. In another embodiment, a layer of carbon and/or nitrogen can be formed between the semiconductor-containing layer and the metal semiconductor alloy layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a gate structure present on a channel portion of a semiconductor substrate, wherein the gate structure comprises: a gate dielectric layer overlaying said channel portion of the semiconductor substrate, an electrically conducting layer present directly on a topmost surface of the gate dielectric layer, said electrically conducing layer comprises at least one metal that provides a threshold voltage shift to said gate struc…

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What does patent US9166014B2 cover?
A gate structure is provided on a channel portion of a semiconductor substrate. The gate structure may include an electrically conducting layer present on a gate dielectric layer, a semiconductor-containing layer present on the electrically conducting layer, a metal semiconductor alloy layer present on the semiconductor-containing layer, and a dielectric capping layer overlaying the metal semic…
Who is the assignee on this patent?
IBM, Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification H10D64/01318. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).