Circuit substrate and display device

Patent metadata

Field	Value
Publication number	US-9164342-B2
Application number	US-200913119713-A
Country	US
Kind code	B2
Filing date	May 12, 2009
Priority date	Sep 26, 2008
Publication date	Oct 20, 2015
Grant date	Oct 20, 2015

Abstract

Provided is a circuit substrate which can integrate circuit elements without degrading wiring characteristics, and a display device including the circuit substrate. The circuit substrate of the present invention includes a transistor substrate ( 10 ) which is a support substrate ( 1 ) having a transistor ( 20 ) and an external connection terminal ( 50 ) mounted thereon, and an external member ( 60 ) attached on the transistor substrate ( 10 ). The external member ( 60 ) is connected physically and electrically to the external connection terminal ( 50 ) through a conductive member ( 3 ), and the transistor ( 20 ) and the external connection terminal ( 50 ) are arranged side by side.

First claim

The invention claimed is:

1. A circuit substrate comprising:
a transistor substrate having a support substrate with a transistor and an external connection terminal mounted thereon; and
an external member attached to the transistor substrate,
wherein the external member is connected physically and electrically through a conductive member to the external connection terminal, and the transistor is disposed side by side with the external connection terminal,
wherein the transistor is disposed in a region overlapping the external member, and
wherein the conductive member is a conductive fine particle in an anisotropic conductive film and a distance between the transistor substrate and the external member in a region overlapping the transistor is larger than the diameter of the conductive fine particle.

2. The circuit substrate according to claim 1 , wherein the external member has a conductive protrusion in an area that overlaps the external connection terminal.

3. The circuit substrate according to claim 1 , wherein a distance between the transistor substrate and the external member is shorter in a region overlapping the external connection terminal than in a region overlapping the transistor.

4. The circuit substrate according to claim 1 , wherein a distance between the transistor substrate and the external member is shortest in a region overlapping the external connection terminal.

5. The circuit substrate according to claim 1 , wherein the external connection terminal is a laminated body with a plurality of conductive films laminated thereon.

6. The circuit substrate according to claim 1 , wherein the circuit substrate further comprises an inorganic insulating film located directly underneath a surface on an opposite side of a surface of the external connection terminal where the external member is connected.

7. The circuit substrate according to claim 1 , wherein the circuit substrate further comprises a sub-pillar assisting physical connection of the transistor substrate and the external member.

8. The circuit substrate according to claim 1 , wherein a plurality of the external connection terminals are disposed side by side forming a sequence of lines linearly or in a zigzag manner.

9. The circuit substrate according to claim 1 , wherein the circuit substrate further comprises an input external connection terminal and an output external connection terminal, and the input external connection terminal and the output external connection terminal are disposed alternately to form a line.

10. The circuit substrate according to claim 1 , wherein the circuit substrate is a display device circuit substrate including a display region and a peripheral circuit region, and the external member is disposed in the peripheral circuit region.

11. A display device comprising the circuit substrate according to claim 1 , wherein the circuit substrate includes a display region and a peripheral circuit region, and the external member is disposed in the peripheral circuit region.

12. The circuit substrate according to claim 2 , wherein the conductive member and the conductive protrusion serve as a pillar supporting the transistor substrate and the external member.

13. The circuit substrate according to claim 5 , wherein the laminated body comprises a conductive film having a material constituting the transistor.

14. The circuit substrate according to claim 8 , wherein the sequence of lines is disposed along a side of the external member.

15. The circuit substrate according to claim 10 , wherein the circuit substrate further comprises a lead-out wiring having at least one bending portion, and the lead-out wiring extends from the external connection terminal in a direction away from the display region and through the bending portion extends toward the display region.

16. A circuit substrate comprising:
a circuit wiring substrate having a support substrate with a circuit wiring and an external connection terminal mounted thereon; and
an external member attached to the circuit wiring substrate,
wherein the external member is connected physically and electrically through a conductive member to the external connection terminal, and the circuit wiring includes a fine circuit wiring having a width narrower than a width of the conductive member,
wherein the fine circuit wiring is disposed side by side with the external connection terminal,
wherein the fine circuit wiring is disposed in a region overlapping the external member, and

wherein the conductive member is a conductive fine particle in an anisotropic conductive film and a distance between the circuit wiring substrate and the external member in a region overlapping the fine circuit wiring is larger than the diameter of the conductive fine particle.

17. The circuit substrate according to claim 16 , wherein the external member has a conductive protrusion in an area that overlaps the external connection terminal, and
wherein the conductive member and the conductive protrusion serve as a pillar supporting the circuit wiring substrate and the external member.

18. The circuit substrate according to claim 16 , wherein a distance between the circuit wiring substrate and the external member is shorter in a region overlapping the external connection terminal than in a region overlapping the fine circuit wiring.

19. The circuit substrate according to claim 16 , wherein a distance between the circuit wiring substrate and the external member is shortest in a region overlapping the external connection terminal.

20. The circuit substrate according to claim 16 , wherein the external connection terminal is a laminated body with a plurality of conductive films laminated thereon, and
wherein the laminated body comprises a conductive film having a material constituting the circuit wiring.

21. The circuit substrate according to claim 16 , wherein the circuit wiring comprises a lead-out wiring including at least one bending portion.

22. The circuit substrate according to claim 16 , wherein the circuit substrate further comprises a sub-pillar assisting physical connection of the circuit wiring substrate and the external member.

23. A display device comprising the circuit substrate according to claim 16 , wherein the circuit substrate includes a display region and a peripheral circuit region, and the external member is disposed in the peripheral circuit region.

24. The circuit substrate according to claim 21 , wherein the lead-out wiring comprises a fine circuit wiring.

25. The circuit substrate according to claim 21 , wherein the lead-out wiring is further extended from a terminal lead-out wiring which extends from the external connection terminal.

26. A circuit substrate comprising:
a transistor substrate having a support substrate with a transistor and an external connection terminal mounted thereon; and
an external member attached to the transistor substrate,
wherein the external member is connected physically and electrically through a conductive member to the external connection terminal, and the transistor is disposed side by side with the external connection terminal,
wherein the transistor is disposed in a region overlapping the external member, and
wherein the conductive member is a conductive fine particle in an anisotropic conductive film and a distance between the transistor substrate and the external member in a region overlapping the external connection termina

Assignees

• Moriwaki Hiroyuki
• Sharp Kk

Inventors

• Moriwaki Hiroyuki

Classifications

• H10W90/732

  between stacked chips · CPC title

• H10W72/944

  Dispositions of multiple bond pads · CPC title

• H10W72/922

  Bond pads being integral with underlying chip-level interconnections · CPC title

• H10W72/354

  comprising polymers · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title