Glass-silicon wafer-stacked opto-electronic platforms

Patent metadata

Field	Value
Publication number	US-9164249-B2
Application number	US-201214365129-A
Country	US
Kind code	B2
Filing date	Jan 27, 2012
Priority date	Jan 27, 2012
Publication date	Oct 20, 2015
Grant date	Oct 20, 2015

Abstract

A glass-silicon wafer stacked platform. The platform includes a plurality of silicon pillars defining a ferrule receptacle, a silicon spacer connected to bases of the pillars and enclosing an aperture, a glass wafer bonded to the spacer, a microlens array formed in a first surface of the glass wafer and located in the aperture, conductive material carried by a second surface of the glass wafer, and contacts in electrical communication with the conductive material.

First claim

We claim:

1. A glass-silicon wafer stacked platform comprising:
a plurality of silicon pillars defining a ferrule receptacle;
a silicon spacer connected to bases of the pillars and enclosing an aperture;
a glass wafer bonded to the spacer;
a microlens array formed in a first surface of the glass wafer and located in the aperture;
conductive material carried by a second surface of the glass wafer; and
contacts in electrical communication with the conductive material.

2. The platform of claim 1 and further comprising an etch stop layer between the pillars and the spacer.

3. The platform of claim 1 wherein at least one of the pillars has a sloping sidewall that defines an acute angle with respect to the base of that pillar.

4. The platform of claim 1 and further comprising a wall at least partially enclosing the ferrule receptacle.

5. The platform of claim 4 wherein the wall and the pillars are shaped to define a cavity that is relatively narrow adjacent the bases of the pillars and relatively wide adjacent a distal end of the pillars.

6. The platform of claim 1 and further comprising an opto-electronic die attached to at least one of the contacts and in optical communication with the microlens and aligned for optical communication with an optical transmission medium attached to the ferrule receptacle.

7. The platform of claim 1 and further comprising a light-transmissive material in the aperture.

8. A method of fabricating a glass-silicon wafer stacked platform, the method comprising:
etching a receptacle wafer of a silicon wafer assembly to form as plurality of pillars that define a ferrule receptacle;
etching a support wafer of the silicon wafer assembly to form a spacer and an aperture;
fabricating a microlens on as lens surface of a glass wafer;
depositing conductive material on a surface of the glass wafer opposite the lens surface;
bonding the lens surface of the glass water to the support wafer; and
depositing contacts on the conductive material.

9. The method of claim 8 wherein:
the silicon wafer assembly comprises an etch stop layer between the receptacle wafer and the support wafer; and
etching the support wafer comprises removing any etch stop from the aperture.

10. The method of claim 8 wherein etching the receptacle wafer to form the plurality of pillars comprises forming a sloping sidewall on at least one of the pillars, the sloping sidewall defining an acute angle with respect to a base of the pillar.

11. The method of claim 8 and further comprising:
covering the conductive material with an electrically insulating dielectric; and
forming openings in the electrically insulating dielectric to expose portions of the conductive material; and wherein:
depositing contacts on the conductive material comprises depositing the contacts through the openings in the dielectric.

12. The method of claim 8 and further comprising attaching an opto-electronic die to the contacts.

13. The method of claim 8 and further comprising depositing a light-transmissive material in the aperture.

14. The method of claim 8 wherein bonding the lens surface is performed after etching the support water.

15. The method of claim 8 wherein bonding the lens surface is performed prior to etching the support wafer.

Assignees

• Mathai Sagi Varghese
• Tan Michael Renne Ty
• Sorin Wayne Victor
• Rosenberg Paul Kessler
• Panotopoulos Georgios
• Patra Susant K
• Hewlett Packard Development Co

Inventors

• Mathai Sagi Varghese
• Tan Michael Renne Ty
• Sorin Wayne Victor
• Rosenberg Paul Kessler
• Panotopoulos Georgios
• Patra Susant K

Classifications

• H10F77/407

  indirectly associated with the devices · CPC title

• G02B6/4279

  Radio frequency signal propagation aspects of the electrical connection, high frequency adaptations · CPC title

• G02B6/4259 Primary

  of the transparent type · CPC title

• G02B6/423 Primary

  using guiding surfaces for the alignment · CPC title

• H01L31/02325

  Electricity · mapped topic