Apparatus and method for testing semiconductor device

US9164145B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9164145-B2
Application numberUS-201313750882-A
CountryUS
Kind codeB2
Filing dateJan 25, 2013
Priority dateNov 15, 2012
Publication dateOct 20, 2015
Grant dateOct 20, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

There are provided an apparatus for testing a semiconductor device and a method for testing a semiconductor device. The apparatus for testing a semiconductor device includes: a temperature detection unit detecting a temperature of a semiconductor device to generate a detected temperature; a controller comparing the detected temperature with a preset control temperature to generate a comparison result, and determining whether to cool the semiconductor device according to the comparison result; and a cooling unit cooling the semiconductor device according to a control of the controller, wherein the controller resets the control temperature, when the detected temperature is outside of a range of an operational temperature of the semiconductor device.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for testing a semiconductor device, the apparatus comprising: a temperature detection unit detecting a temperature of a semiconductor device to generate a detected temperature; a controller comparing the detected temperature with a preset control temperature to generate a comparison result, and determining whether to cool the semiconductor device according to the comparison result; and a cooling unit cooling the semiconductor device according to a control of the controller, wherein the controller resets the control temperature, when the detected temperature is outside of a range of an operational temperature of the semiconductor device, wherein the control temperature includes a first control temperature and a second control temperature, and wherein the controller resets the first control temperature and the second control temperature according to the detected temperature and the operational temperature. 2. The apparatus of claim 1 , wherein the controller controls the cooling unit to start the cooling of the semiconductor device at a point in time at which the detected temperature is equal to or higher than the first control temperature and stop the cooling of the semiconductor device at a point in time at which the detected temperature is equal to or lower than the second control temperature. 3. The apparatus of claim 1 , wherein the operational temperature includes a first operational temperature as a highest operational temperature at which the semiconductor device is operable and a second operational temperature as a lowest operational temperature at which the semiconductor device is operable. 4. The apparatus of claim 3 , wherein the controller resets the first control temperature by comparing the first operational temperature with a highest measured temperature in a rising section in which the detected temperature rises, and resets the second control temperature by comparing the second operational temperature with a lowest measured temperature in a falling section in which the detected temperature falls. 5. The apparatus of claim 3 , wherein the controller resets the first control temperature in an (M+1)th rising section by comparing the first operational temperature with a highest measured temperature in an Mth rising section in which the detected temperature rises, and resets the second control temperature in an (N+1)th falling section by comparing the second operational temperature with a lowest measured temperature in an Nth falling section in which the detected temperature falls, wherein the M and the N are integers equal to or greater than 1. 6. The apparatus of claim 5 , wherein the controller satisfies conditional expression 1 regarding the first control temperature in the (M+1)th rising section and satisfies conditional expression 2 regarding the second control temperature in the (N+1)th falling section: Th M+1 =Th M +w 1*( T 01 −T M — max )   [Conditional expression 1] wherein Th M is the first control temperature in an Mth rising section, w1 is a first weight, T 01 is the first operational temperature, and T M max is a highest measured temperature in the Mth rising section: Tl N+1 =Tl N +w 2*( T 02 −T N — min )   [Conditional expression 2] wherein Tl N is the second control temperature in an Nth falling section, w2 is a second weight, T 02 is the second operational temperature, and T N min is a lowest measured temperature in the Nth falling section. 7. The apparatus of claim 1 , further comprising a testing board on which the semiconductor device is mounted. 8. The apparatus of claim 7 , wherein the semiconductor device may be provided in plural, and the plurality of semiconductor devices are mounted on the testing board. 9. The apparatus of claim 8 , wherein the controller compares detected temperatures of the plurality of semiconductor devices with the control temperature, and controls the cooling unit to cool the plurality of semiconductor devices, respectively. 10. A method for testing a semiconductor device, the method comprising: detecting a temperature of a semiconductor device; comparing the detected temperature of the semiconductor device with a preset control temperature, and cooling the semiconductor device; and resetting the control temperature when the detected temperature is outside of a range of an operational temperature of the semiconductor device, wherein the control temperature includes a first control temperature and a second control temperature, and wherein in the resetting of the control temperature, the first control temperature and the second control temperature are reset according to the detected temperature and the operational temperature. 11. The method of claim 10 , wherein in the cooling of the semiconductor device, the cooling of the semiconductor device is started at a point in time at which the detected temperature is equal to or higher than the first control temperature and stopped at a point in time at which the detected temperature is equal to or lower than the second control temperature. 12. The method of claim 10 , wherein the operational temperature includes a first operational temperature as a highest operational temperature at which the semiconductor device is operable and a second operational temperature as a lowest operational temperature at which the semiconductor device is operable. 13. The method of claim 12 , wherein in the resetting of the control temperature, the first control temperature is reset by comparing the first operational temperature with a highest measured temperature in a rising section in which the detected temperature rises, and the second control temperature is reset by comparing the second operational temperature with a lowest measured temperature in a falling section in which the detected temperature falls. 14. method of claim 13 , wherein in the resetting of the control temperature, the first control temperature in an (M+1)th rising section is reset by comparing the first operational temperature with a highest measured temperature in an Mth rising section in which the detected temperature rises, and the second control temperature in an (N+1)th falling section is reset by comparing the second operational temperature with a lowest measured temperature in an Nth falling section in which the detected temperature falls, wherein the M and the N are integers equal to or greater than 1. 15. The method of claim 14 , wherein in the resetting of the control temperature, conditional expression 1 is satisfied regarding the first control temperature in the (M+1)th rising section and conditional expression 2 is satisfied regarding the second control temperature in the (N+1)th falling section: Th M+1 =Th M +w 1*( T 01 −T M — max )   [Conditional expression 1] wherein Th M is the first control temperature in an Mth rising section, w1 is a first weight, T 01 is the first operational temperature, and T M max is a highest measured temperature in the Mth rising section: Tl N+1 =Tl N +w 2*( T 02 −T N — min )   [Conditional expression 2] wherein Tl N is the second control temperature in an Nth falling section, w2 is a second weight, T 02 is the second operational temperature, and T N min is a lowest measured temperature in the Nth falling section.

Assignees

Inventors

Classifications

  • related to temperature · CPC title

  • G01R31/26Primary

    Testing of individual semiconductor devices (testing of photovoltaic devices H02S50/10; testing or measuring during manufacture or treatment {H10P74/00}) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9164145B2 cover?
There are provided an apparatus for testing a semiconductor device and a method for testing a semiconductor device. The apparatus for testing a semiconductor device includes: a temperature detection unit detecting a temperature of a semiconductor device to generate a detected temperature; a controller comparing the detected temperature with a preset control temperature to generate a comparison …
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification G01R31/2874. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).