Method for protecting a semiconductor device against degradation and a method for manufacturing a semiconductor device protected against hot charge carriers

Patent metadata

Field	Value
Publication number	US-9159796-B2
Application number	US-201314083595-A
Country	US
Kind code	B2
Filing date	Nov 19, 2013
Priority date	Jul 26, 2010
Publication date	Oct 13, 2015
Grant date	Oct 13, 2015

Abstract

A method for protecting a semiconductor device against degradation of its electrical characteristics is provided. The method includes providing a semiconductor device having a first semiconductor region and a charged dielectric layer which form a dielectric-semiconductor interface. The majority charge carriers of the first semiconductor region are of a first charge type. The charged dielectric layer includes fixed charges of the first charge type. The charge carrier density per area of the fixed charges is configured such that the charged dielectric layer is shielded against entrapment of hot majority charge carriers generated in the first semiconductor region. Further, a semiconductor device which is protected against hot charge carriers and a method for forming a semiconductor device are provided.

First claim

What is claimed is:

1. A method for protecting a semiconductor device against degradation of its electrical characteristics, comprising:
providing a semiconductor device comprising a first semiconductor region and a charged dielectric layer which form a dielectric-semiconductor interface, the first semiconductor region comprising majority charge carriers of a first charge type, and the charged dielectric layer comprising fixed charges of the first charge type; and
configuring a charge carrier density per area of the fixed charges such that the charged dielectric layer is shielded against entrapment of hot majority charge carriers generated in the first semiconductor region.

2. The method of claim 1 , further comprising providing the semiconductor device with the charged dielectric layer being arranged along a drift region formed by the first semiconductor region.

3. The method of claim 1 , further comprising providing the semiconductor device with the charged dielectric layer forming at least a part of a field dielectric layer which insulates a field plate from the first semiconductor region.

4. The method of claim 1 , wherein the charge carrier density per area of the fixed charges changes step-wise or continuously along a path in the charged dielectric layer, the path being parallel to the dielectric-semiconductor interface.

5. The method of claim 1 , wherein the charged dielectric layer comprises a maximum carrier density per area of the fixed charges which is larger than about 10 11 /cm 2 .

6. A method for forming a semiconductor device, comprising:
providing a semiconductor body comprising a first semiconductor region comprising majority charge carriers of a first charge type;
forming a dielectric region comprising fixed charges of the first charge type, comprising:
forming a first dielectric layer on the first semiconductor region;
forming a second layer on the first dielectric layer by atomic layer deposition; and
forming a second dielectric layer on the second layer, such that the dielectric region and the first semiconductor region form an insulator-semiconductor interface; and

forming an electrode structure next to the dielectric region, such that the electrode structure is insulated from the semiconductor body;
wherein the first semiconductor region forms a drift region, and wherein the electrode structure forms at least one of a field plate and a gate electrode comprising a portion which is arranged next to the dielectric region and configured to operate as a field plate.

7. The method of claim 6 , wherein the dielectric region is formed such that the dielectric region comprises portions of different maximum charge carrier densities per area.

8. The method of claim 6 , wherein the first dielectric layer comprises silicon oxide, and wherein the second layer comprises at least one of aluminum, aluminum oxide, cesium, cesium oxide, and a nitride doped silicon oxide.

9. The method of claim 6 , wherein forming a first dielectric layer comprises at least one of:
depositing a semiconductor material;
thermally oxidizing; and
depositing a dielectric material.

Assignees

• Infineon Technologies Austria

Inventors

• Mauder Anton
• Schulze Hans-Joachim

Classifications

• H10P14/40

  of conductive or resistive materials · CPC title

• H10D64/516

  the thicknesses being non-uniform · CPC title

• H10D64/256

  for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D64/111

  Field plates · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title