Drive method for memory element and storage device using memory element
US-9190145-B2 · Nov 17, 2015 · US
Nonvolatile memory device and method for fabricating the same
US9159727B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9159727-B2 |
| Application number | US-201213537588-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 29, 2012 |
| Priority date | Jul 26, 2011 |
| Publication date | Oct 13, 2015 |
| Grant date | Oct 13, 2015 |
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Abstract
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Provided are a nonvolatile memory device and a method for fabricating the same. The method includes sequentially stacking on a semiconductor substrate a first interlayer dielectric film, a first sacrificial layer, a second interlayer dielectric film, and a second sacrificial layer, forming a resistance variable layer and a first electrode penetrating the first and second interlayer dielectric films and the first and second sacrificial layers, forming an upper trench by removing a top portion of the first electrode, filling the upper trench with a channel layer, exposing a portion of a side surface of the resistance variable layer by removing the second sacrificial layer, forming an insulation layer within the channel layer, and forming a second electrode on the exposed resistance variable layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a nonvolatile memory device, the method comprising: sequentially stacking on a semiconductor substrate a first interlayer dielectric film, a first sacrificial layer, a second interlayer dielectric film, and a second sacrificial layer; forming a resistance variable layer and a first electrode penetrating the first and second interlayer dielectric films and the first and second sacrificial layers; forming an upper trench by removin…
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Electricity · mapped topic
Electricity · mapped topic
- H01L27/101Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9159727B2 cover?
- Provided are a nonvolatile memory device and a method for fabricating the same. The method includes sequentially stacking on a semiconductor substrate a first interlayer dielectric film, a first sacrificial layer, a second interlayer dielectric film, and a second sacrificial layer, forming a resistance variable layer and a first electrode penetrating the first and second interlayer dielectric f…
- Who is the assignee on this patent?
- Park Chan-Jin, Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H01L27/101. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Oct 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).