Method for forming voids of structure

Patent metadata

Field	Value
Publication number	US-9159697-B2
Application number	US-201414219042-A
Country	US
Kind code	B2
Filing date	Mar 19, 2014
Priority date	Oct 15, 2013
Publication date	Oct 13, 2015
Grant date	Oct 13, 2015

Abstract

A method for forming voids corresponding to pads of SMT components is provided. The method comprises following steps: One or more condition parameters are inputted into a searching unit. The searching unit searches all of the pads with reference to the condition parameters to obtain a pre-selected group of pads. A judgment unit is provided to determine whether each pad of the pre-selected group of pads meets a pre-determined processing requirement to generate a to-be-processed group of pads. An execution unit executes a void formation step with reference to corner coordinates of each of the to-be-processed group of pads, so as to form at least a void at the portion of a contact surface corresponding to a corner of the pad. In an embodiment, four voids which are related to respective corners of each pad of the to-be-processed group are formed at the contact surface accordingly.

First claim

What is claimed is:

1. A method for forming voids, at least comprising:
inputting one or more condition parameters into a searching unit;
searching all of a plurality of pads with reference to the one or more condition parameters by the searching unit to obtain a pre-selected group of the plurality of pads;
providing a judgment unit to determine whether each pad of the pre-selected group of the plurality of pads meets a pre-determined processing requirement to generate a to-be…

Assignees

• Wistron Corp

Inventors

• Chou Hui-Ying
• Kang Lee-Chieh

Classifications

• H10W70/68

  Electricity · mapped topic

• H10W20/44

  Electricity · mapped topic

• H10W20/43

  Electricity · mapped topic

• H10W72/072 Primary

  Electricity · mapped topic

• H01L24/81 Primary

  Electricity · mapped topic