Semiconductor ceramic and method for manufacturing the same, and laminated semiconductor ceramic capacitor with varistor function and method for manufacturing the same

US9153643B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9153643-B2
Application numberUS-201313873345-A
CountryUS
Kind codeB2
Filing dateApr 30, 2013
Priority dateFeb 3, 2011
Publication dateOct 6, 2015
Grant dateOct 6, 2015

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Abstract

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A semiconductor ceramic contains a donor element solid-solved in crystal grains of a SrTiO 3 -based compound, and an acceptor element in a grain boundary layer. The number of tetravalent acceptor elements is 1×10 17 /g or more, as determined from an electron spin resonance absorption spectrum. A mixture of a calcined powder and an acceptor compound is pulverized to a specific surface area of 5.0 to 7.5 m 2 /g before mixing with a binder. Semiconductor ceramic layers having a varistor function are formed by using the semiconductor ceramic forming a highly reliable capacitor which can suppress characteristics variations to stably obtain good electrical characteristics.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor grain boundary insulated semiconductor ceramic comprising a principal component which is a SrTiO 3 -based compound, a donor element solid-solved in crystal grains, and an acceptor element present in a grain boundary layer, and in which the number of tetravalent acceptor elements per unit weight (g) is 1×10 17 /g or more. 2. The semiconductor ceramic according to claim 1 , where the number of the tetravalent acceptor…

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What does patent US9153643B2 cover?
A semiconductor ceramic contains a donor element solid-solved in crystal grains of a SrTiO 3 -based compound, and an acceptor element in a grain boundary layer. The number of tetravalent acceptor elements is 1×10 17 /g or more, as determined from an electron spin resonance absorption spectrum. A mixture of a calcined powder and an acceptor compound is pulverized to a specific surface area of 5.…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification B82Y30/00. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Oct 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).