Gate driver and display apparatus having the same

Patent metadata

Field	Value
Publication number	US-9153190-B2
Application number	US-33356108-A
Country	US
Kind code	B2
Filing date	Dec 12, 2008
Priority date	Jul 8, 2008
Publication date	Oct 6, 2015
Grant date	Oct 6, 2015

Abstract

A gate driver that comprises n shift registers, wherein n is an integer equal to or larger than 1, each of the n shift registers includes; a start stage which outputs a gate signal and starts its operation in response to a start signal, and a plurality of subsequent stages which are connected to each other in sequence, and which sequentially output a plurality of gate signals in response to a signal output from the start stage, wherein at least one stage of the plurality of subsequent stages is reset by the start signal.

First claim

What is claimed is:

1. A gate driver that comprises a shift registers, the shift register having only n stages, wherein n is an integer equal to or larger than 1, the n stages consisting of a start stage which corresponds to n=1 and a plurality of subsequent stages which correspond to n=2 to n, respectively;
wherein the start stage outputs a gate signal and starts its operation in response to a start signal; and
wherein the plurality of subsequent stages are connected to each other in sequence, and which sequentially output a plurality of gate signals in response to a signal output from the start stage, and
wherein the start signal is directly applied to the start stage and applied to the plurality of subsequent stages except for a stage immediately subsequent to the start stage, and the plurality of subsequent stages except for the stage immediately subsequent to the start stage is reset by the start signal.

2. The gate driver of claim 1 , wherein each of the plurality of subsequent stages comprises an input terminal which receives a signal output from a previous stage, a control terminal which receives a signal output from a subsequent stage, a reset terminal which receives a reset signal, and an output terminal which outputs the gate signal, and at least one stage of the plurality of subsequent stages receives the start signal as the reset signal through the reset terminal thereof.

3. The gate driver of claim 2 , wherein each of the plurality of subsequent stages comprises:
a pull-up part which pulls up the gate signal output through the output terminal;
a pull-up driving part which turns on the pull-up part in response to the signal received through the input terminal and output from the previous stage and turns off the pull-up part in response to the signal applied through the control terminal and output from the subsequent stage;
a pull-down part connected to the control terminal and which pulls down the gate signal in response to the signal output from the subsequent stage; and
a reset part connected to the reset terminal and which turns off the pull-up part in response to the reset signal.

4. The gate driver of claim 3 , wherein each of the plurality of subsequent stages further comprises:
a carry terminal which outputs a carry signal; and
a carry part which pulls up the carry signal output from the carry terminal.

5. The gate driver of claim 4 , wherein the signal output from the previous stage serves as the carry signal output from the carry terminal of the previous stage, and the signal output from the subsequent stage serves as a gate signal output from the output terminal of the subsequent stage.

6. The gate driver of claim 2 , wherein the start signal is applied to the reset terminal of each of the plurality of subsequent stages except for a stage immediately subsequent to the start stage.

7. The gate driver of claim 2 , wherein a dummy stage applies a signal to the control terminal of the last of the plurality of subsequent stages.

8. The gate driver of claim 7 , wherein the dummy stage comprises an input terminal which receives a signal output from the last of the plurality of subsequent stages, a control terminal which receives a control signal of the dummy stage, a reset terminal which receives a reset signal of the dummy stage, and an output terminal which outputs a dummy gate signal, and
wherein the reset terminal of the dummy stage is connected to the output terminal of the dummy stage and receives the dummy gate signal as the reset signal of the dummy stage.

9. The gate driver of claim 8 , wherein the control terminal of the dummy stage receives the start signal as the control signal of the dummy stage.

10. A display apparatus comprising:
a display panel which displays an image, the display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels respectively connected to the plurality of gate lines and the plurality of data lines;
a data driver which applies a data signal to the plurality of data lines; and
a gate driver which sequentially applies a gate signal to the plurality of gate lines,
wherein the gate driver comprises a shift register, the shift register having only n stages, wherein n is an integer equal to or larger than 1, the n stages consisting of a start stage which corresponds to n=1 and a plurality of subsequent stages which correspond to n=2 to n, respectively;
wherein the start stage outputs a gate signal and starts its operation in response to a start signal; and
wherein the plurality of subsequent stages are connected to each other in sequence, and which sequentially output the gate signal in response to a signal output from the start stage,
wherein at least one stage of the plurality of subsequent stages is reset by the start signal
wherein the start is directly applied to the start stage and applied to the plurality of subsequent stages except for a stage immediately subsequent to the start stage, and the plurality of subsequent stage except for the stage immediately subsequent to the start stage is reset by the start signal.

11. The display apparatus of claim 10 , wherein each of the plurality of subsequent stages comprises an input terminal which receives a signal output from a previous stage, a control terminal which receives a signal output from a subsequent stage, a reset terminal which receives a reset signal, and an output terminal which outputs the gate signal, and at least one stage of the plurality of subsequent stages receives the start signal as the reset signal through the reset terminal thereof.

12. The display apparatus of claim 11 , wherein each of the plurality of subsequent stages comprises:
a pull-up part which pulls up the gate signal output through the output terminal;
a pull-up driving part which turns on the pull-up part in response to the signal received through the input terminal and output from the previous stage and turns off the pull-up part in response to the signal applied through the control terminal and output from the subsequent stage;
a pull-down part connected to the control terminal and which pulls down the gate signal in response to the signal output from the subsequent stage; and
a reset part connected to the reset terminal and which turns off the pull-up part in response to the reset signal.

13. The display apparatus of claim 12 , wherein each of the plurality of subsequent stages further comprises:
a carry terminal which outputs a carry signal; and
a carry part which pulls up the carry signal output from the carry terminal.

14. The display apparatus of claim 13 , wherein the signal output from the carry terminal of the previous stage serves as the carry signal output from the carry terminal of previous stage, and the signal output from the subsequent stage serves as the gate signal output from the output terminal of the subsequent stage.

15. The display apparatus of claim 11 , wherein the start signal is applied to the reset terminal of each of the plurality of subsequent stages except for a stage immediately subsequent to the start stage.

16. The display apparatus of claim 11 , wherein a dummy stage applies a signal to the control terminal of the last of the plurality of subsequent stages.

17. The display apparatus of claim 16 , wherein the dummy stage comprises an input terminal which receives a signal output from the last of the plurality of subsequent stages, a control terminal which receives a control signal of the dummy stage, a reset terminal which receives a reset signal of the dummy stage, and an output terminal which out

Assignees

• Ahn Soon-Il
• Kwon Ho-Kyoon
• Na Byoung-Sun
• Ki Dong-Hyon
• Baek Seung-Soo
• Na Hye-Seok
• Samsung Display Co Ltd

Inventors

• Ahn Soon-Il
• Kwon Ho-Kyoon
• Na Byoung-Sun
• Ki Dong-Hyon
• Baek Seung-Soo
• Na Hye-Seok

Classifications

• G09G3/3677 Primary

  suitable for active matrices only · CPC title

• G09G2330/08

  Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared · CPC title

• G11C19/184

  with field-effect transistors, e.g. MOS-FET · CPC title

• G11C19/28

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title

• G09G3/36 Primary

  using liquid crystals · CPC title