Transactional memory that performs a CAMR 32-bit lookup operation

US9152452B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9152452-B2
Application numberUS-201213598448-A
CountryUS
Kind codeB2
Filing dateAug 29, 2012
Priority dateAug 29, 2012
Publication dateOct 6, 2015
Grant dateOct 6, 2015

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Abstract

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A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a base address, a starting bit position, and a mask size. In response to the command, the TM pulls an input value (IV). A selecting circuit within the TM uses the starting bit position and the mask size to select a first portion of the IV. The first portion of the IV and the base address value are summed to generate a memory address. The memory address is used to read a word containing multiple result values and multiple reference values from memory. A second portion of the IV is compared with each reference value using a comparator circuit. A result value associated with the matching reference value is selected using a multiplexing circuit and a select value generated by the comparator circuit. The TM sends the selected result value to the processor.

First claim

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What is claimed is: 1. A method comprising: (a) receiving a lookup command onto a transactional memory, wherein the transactional memory includes a lookup engine and a memory unit; (b) receiving an input value (IV); (c) selecting a first portion of the IV and a second portion of the IV; (d) reading a word out of the memory unit, wherein the word includes a plurality of result values and a plurality of reference values; (e) storing the result values, the reference values, a…

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What does patent US9152452B2 cover?
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a base address, a starting bit position, and a mask size. In response to the command, the TM pulls an input value (IV). A selecting circuit within the TM uses the starting bit position and the mask size to select a first portion of the IV. The first portion of the IV and the base address va…
Who is the assignee on this patent?
Stark Gavin J, Netronome Systems Inc
What technology area does this patent fall under?
Primary CPC classification G06F9/467. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).