Power control circuit and electronic device

Patent metadata

Field	Value
Publication number	US-9152215-B2
Application number	US-201313972855-A
Country	US
Kind code	B2
Filing date	Aug 21, 2013
Priority date	Jan 21, 2013
Publication date	Oct 6, 2015
Grant date	Oct 6, 2015

Abstract

A basic and simple power control circuit for selectively controlling power to an electronic device is provided. The electronic device includes a power module, a system power port, and a processing unit, the processing unit includes a first and a second power control pins. The power control circuit includes a power switch, a trigger signal producing sub-circuit, a trigger-receiving sub-circuit, and a switch controlling sub-circuit. The switch is connected between the power module and the system power port. The trigger signal producing sub-circuit produces a trigger signal. When receiving a trigger signal, the trigger-receiving sub-circuit follows a first control signal output by the second power control pin to output the first control signal. The switch controlling sub-circuit turns off the power switch when receiving the first control signal.

First claim

What is claimed is:

1. A power control circuit for controlling power of an electronic device, the power control circuit comprising:
an on-off control circuit comprising:
a switch to be connected between a power module and a system power port of the electronic device;
a trigger signal producing sub-circuit to be connected to a first on-off control pin of a processing unit of the electronic device, wherein the trigger signal producing sub-circuit comprises a transistor, and the transistor configured to produce an edge trigger signal in response to a signal output by the first on-off control pin is changed from a first control signal to a second control signal;
a trigger-receiving sub-circuit to be connected to a second on-off control pin of the processing unit of the electronic device and the trigger signal producing sub-circuit, configured to follow a signal output by the second on-off control pin and then output the signal of the second on-off control pin when receiving the edge trigger signal from the trigger signal producing sub-circuit, wherein, the second on-off control pin outputs the first control signal, and the trigger-receiving sub-circuit outputs the first control signal when receiving the edge trigger signal;
a switch control sub-circuit connected between the trigger-receiving sub-circuit and the switch, configured to turn off the switch when receiving the first control signal from the trigger-receiving sub-circuit; and
a standby control circuit to be connected between the system power port, a function module of the electronic device, and a standby control pin of the processing unit;
wherein the standby control circuit is configured to cut off a connection between the system power port and the function module when receiving a standby control signal from the standby control pin.

2. The power control circuit according to claim 1 , wherein the trigger signal producing sub-circuit further comprises a first resistor, a second, and a diode D 1 , the first resistor and the second resistor are connected between a voltage port and ground in series; the transistor is a negative-positive-negative bipolar junction transistor (NPN BJT), the diode is connected between the first on-off control pin and a base of the NPN BJT, an emitter of the NPN BJT is grounded, and a collector of the NPN BJT is connected to a connection node of the first resistor and the second resistor.

3. The power control circuit according to claim 2 , wherein the trigger-receiving sub-circuit comprises a third resistor and a D-flip flop, the D-flip flop comprises an input terminal, an output terminal, and a trigger terminal, the input terminal is connected to the second on-off control pin, the trigger terminal is connected to the connection node of the first resistor and the second resistor, and the third resistor is connected between the input terminal and ground.

4. The power control circuit according to claim 3 , wherein the switch control sub-circuit comprises a fourth resistor, a fifth resistor, a sixth resistor, a N-channel metal oxide semiconductor field effect transistor (NMOSFET), and a second NPN BJT; a gate of the NMOSFET is connected to the output terminal of the D-flip flop and is grounded via the fourth resistor, the fifth resistor is connected between the voltage port and a drain of the NMOSFET, a source of the NMOSFET is grounded; the drain of the NMOSFET is further connected to a base of the second NPN BJT, an emitter of the second NPN BJT is grounded, the sixth resistor is connected between the power module and a collector of the second NPN BJT.

5. The power control circuit according to claim 4 , wherein the switch is a P-channel metal oxide semiconductor field effect transistor (PMOSFET), a source and a gate of the PMOSFET are connected to two ends of the sixth resistor, a drain of the PMOSFET is connected to the system power port, the source of the PMOSFET is further connected to the power module.

6. The power control circuit according to claim 1 , wherein the standby control circuit comprises a plurality of MOSFETs; Gates of the MOSFETs are all connected to the standby control pin of the processing unit, sources of the MOSFETs are all connected to the system power port, and drains of the MOSFETs are connected to function chips of the function module one by one.

7. An electronic device for indicating status, comprising:
a power button configured to produce a signal in response to user operation;
a system power port;
a power module configured to provide power to the electronic device via the system power port;
a function module;
a processing unit comprising a receive pin, a first on-off control pin, and a second on-off control pin; wherein, the processing unit receives the signal produced by the power button via the receive pin, the processing unit controls the first on-off control pin and a second on-off control pin both to output a first control signal and controls the electronic device to be soft shutdown when determining that a duration of the key from the power button is greater than a first predetermined time and the electronic device is at a normal work state; the processing unit further controls the first on-off control pin to output a second control signal after the soft shutdown is finished; and
a power control circuit comprising an on-off control circuit, the on-off control circuit comprising:
a switch to be connected between the power module and the system power port;
a trigger signal producing sub-circuit connected to the first on-off control pin of a processing unit, configured to produce an edge trigger signal in response to the first control signal output by the first on-off control pin is changed to the second control signal;
a trigger-receiving sub-circuit connected to the second on-off control pin of the processing unit and the trigger signal producing sub-circuit, configured to follow the first control signal output by the second on-off control pin and then output the first control signal when receiving the edge trigger signal from the trigger signal producing sub-circuit;
a switch control sub-circuit connected between the trigger-receiving sub-circuit and the switch, configured to turn off the switch when receiving the first control signal from the trigger-receiving sub-circuit.

8. The electronic device according to claim 7 , wherein the trigger signal producing sub-circuit comprises a first resistor, a second, a diode D 1 , and a first negative-positive-negative bipolar junction transistor (NPN BJT), the first resistor and the second resistor are connected between a voltage port and ground in series; the diode is connected between the first on-off control pin and a base of the NPN BJT, an emitter of the NPN BJT is grounded, and a collector of the BPN BJT is connected to a connection node of the first resistor and the second resistor.

9. The electronic device according to claim 8 , wherein the trigger-receiving sub-circuit comprises a third resistor and a D-flip flop, the D-flip flop comprises an input terminal, an output terminal, and a trigger terminal, the input terminal is connected to the second on-off control pin, the trigger terminal is connected to the connection node of the first resistor and the second resistor, and the third resistor is connected between the input terminal and ground.

10. The electronic device according to claim 9 , wherein the switch control sub-circuit comprises a fourth resistor, a fifth resistor, a sixth resistor, a N-channel metal oxide semiconductor field effect transistor (NMOSFET), and a second NPN BJT; a gate of the NMOSFET is connected to the output terminal of the D-flip flop and is grounded via the fourth resistor, the fifth resistor is connected between the voltage p

Assignees

• Ambit Microsystems Shanghai
• Hon Hai Prec Ind Co Ltd

Inventors

• Wang Gen
• Liu Jin

Classifications

• H03K17/687

  the devices being field-effect transistors · CPC title

• H03K17/10

  Modifications for increasing the maximum permissible switched voltage · CPC title

• H03K2217/0054

  Gating switches, e.g. pass gates · CPC title

• G06F1/3246 Primary

  by software initiated power-off · CPC title

• Y02D30/50

  in wire-line communication networks, e.g. low power modes or reduced link rate · CPC title