Display substrate, display panel, and display apparatus
US-2024411399-A1 · Dec 12, 2024 · US
US9151995B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9151995-B2 |
| Application number | US-201313917901-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 14, 2013 |
| Priority date | Dec 22, 2009 |
| Publication date | Oct 6, 2015 |
| Grant date | Oct 6, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The present invention provides a polymer stabilization alignment liquid crystal display panel having a plurality of pixel regions defined by plurals of data lines and gate lines. Each pixel region includes a main region and a sub region, and a first pixel electrode and a second pixel electrode correspond to the main region and the sub region respectively, wherein each of the data lines has a first width adjacent to the main display region and a second width adjacent to the sub display region, and the second width is larger than the first width. Each first pixel electrode is separated from the adjacent data line and thereby forming a gap therebetween. Each second pixel electrode partially overlaps the adjacent data line to form an overlap width. Accordingly, the present invention not only can increase the aperture ratio, but also well control the liquid crystal molecules located near the data lines.
Opening claim text (preview).
What is claimed is: 1. A polymer stabilization alignment liquid crystal display panel comprising: a first substrate plate; a plurality of gate lines disposed on the first substrate plate; a plurality of data lines disposed on the first substrate plate, and substantially perpendicular to the gate lines, the gate lines and the data lines cooperatively defining a plurality of pixel regions, each pixel region comprising at least a main display region and a sub display region, whe…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.