Method for manufacturing semiconductor device including organic semiconductor

US9150953B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9150953-B2
Application numberUS-65908905-A
CountryUS
Kind codeB2
Filing dateAug 5, 2005
Priority dateAug 13, 2004
Publication dateOct 6, 2015
Grant dateOct 6, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention provides a method for manufacturing a semiconductor device which can reduce characteristic deterioration due to impurity incorporation. The present invention also provides a semiconductor device and an electric appliance with reduced characteristic deterioration due to the impurity incorporation. The method for manufacturing a semiconductor device has a process for depositing an organic semiconductor. In addition, a process for introducing and exhausting gas having low reactivity while heating a treater so that temperature in the inside of the treater is higher than sublimation temperature of the organic semiconductor after taking a subject deposited with the organic semiconductor from the treater.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a semiconductor device comprising the steps of: placing a substrate above a crucible in a treater, wherein the crucible contains a raw material; heating and sublimating the raw material to deposit an organic semiconductor over the substrate in the treater while introducing a first gas from below the crucible and the substrate; removing the substrate from the treater after depositing the organic semiconductor; and introducing a second gas into the treater and exhausting the second gas while heating the treater so that temperature in an inside of the treater is higher than a sublimation temperature of the organic semiconductor after removing the substrate from the treater, wherein the treater includes an outer tube and an inner tube, wherein the outer tube includes a curved top surface, wherein a top end portion of the inner tube is curved along the curved top surface of the outer tube, and wherein the inner tube has an opening at a top portion thereof to flow the first gas and the second gas between the outer tube and the inner tube. 2. The method for manufacturing a semiconductor device according to claim 1 , wherein the first gas and the second gas are same. 3. The method for manufacturing a semiconductor device according to claim 1 , wherein the organic semiconductor is pentacene. 4. A method for manufacturing a semiconductor device comprising the steps of: forming a gate electrode over a substrate; forming a gate insulating layer over the gate electrode; forming a source electrode and a drain electrode over the gate insulating layer; placing the substrate above a crucible in a treater, wherein the crucible contains a raw material; heating and sublimating the raw material to deposit an organic semiconductor while introducing a first gas from below the crucible and the substrate to form an active layer over the gate insulating layer and the source electrode and the drain electrode to be overlapped with the gate electrode; removing the substrate from the treater after depositing the organic semiconductor; and introducing a second gas into the treater and exhausting the second gas while heating the treater so that temperature in an inside of the treater is higher than a sublimation temperature of the organic semiconductor after removing the substrate from the treater, wherein the treater includes an outer tube and an inner tube, wherein the outer tube includes a curved top surface, and wherein a top end portion of the inner tube is curved along the curved top surface of the outer tube, and wherein the inner tube has an opening at a top portion thereof to flow the first gas and the second gas between the outer tube and the inner tube. 5. The method for manufacturing a semiconductor device according to claim 1 , further comprising a step of collecting the organic semiconductor in the second gas after exhausting the second gas. 6. The method for manufacturing a semiconductor device according to claim 1 , wherein the treater is set to a pressure from 0.1 to 50 torr during depositing the organic semiconductor. 7. The method for manufacturing a semiconductor device according to claim 1 , wherein the second gas comprises at least one of a nitrogen gas and a rare gas. 8. A method for manufacturing a semiconductor device comprising the steps of: forming a gate electrode over a substrate; forming a gate insulating layer over the gate electrode; placing the substrate above a crucible in a treater, wherein the crucible contains a raw material; heating and sublimating the raw material to deposit an organic semiconductor while introducing a first gas from below the crucible and the substrate to form an active layer over the gate insulating layer; removing the substrate from the treater after depositing the organic semiconductor; introducing a second gas into the treater and exhausting the second gas while heating the treater so that temperature in an inside of the treater is higher than a sublimation temperature of the organic semiconductor after removing the substrate from the treater; and forming a source electrode and a drain electrode over the active layer, wherein the treater includes an outer tube and an inner tube, wherein the outer tube includes a curved top surface, wherein a top end portion of the inner tube is curved along the curved top surface of the outer tube, and wherein the inner tube has an opening at a top portion thereof to flow the first gas and the second gas between the outer tube and the inner tube. 9. The method for manufacturing a semiconductor device according to claim 8 , wherein the first gas and the second gas are same. 10. The method for manufacturing a semiconductor device according to claim 8 , wherein the organic semiconductor is pentacene. 11. The method for manufacturing a semiconductor device according to claim 8 , further comprising a step of collecting the organic semiconductor in the second gas after exhausting the second gas. 12. The method for manufacturing a semiconductor device according to claim 8 , wherein the treater is set to a pressure from 0.1 to 50 torr during depositing the organic semiconductor. 13. The method for manufacturing a semiconductor device according to claim 8 , wherein the second gas comprises at least one of a nitrogen gas and a rare gas. 14. An electric appliance having a semiconductor device manufactured by the method for manufacturing a semiconductor device according to any one of claims 1 , 8 and 4 . 15. The method for manufacturing a semiconductor device according to claim 4 , wherein the first gas and the second gas are same. 16. The method for manufacturing a semiconductor device according to claim 4 , wherein the organic semiconductor is pentacene. 17. The method for manufacturing a semiconductor device according to claim 4 , further comprising a step of collecting the organic semiconductor in the second gas after exhausting the second gas. 18. The method for manufacturing a semiconductor device according to claim 4 , wherein the treater is set to a pressure from 0.1 to 50 torr during depositing the organic semiconductor. 19. The method for manufacturing a semiconductor device according to claim 4 , wherein the second gas comprises at least one of a nitrogen gas and a rare gas.

Assignees

Inventors

Classifications

  • Vacuum evaporation · CPC title

  • Means for minimising impurities in the coating chamber such as dust, moisture, residual gases · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Organic material · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9150953B2 cover?
The present invention provides a method for manufacturing a semiconductor device which can reduce characteristic deterioration due to impurity incorporation. The present invention also provides a semiconductor device and an electric appliance with reduced characteristic deterioration due to the impurity incorporation. The method for manufacturing a semiconductor device has a process for deposit…
Who is the assignee on this patent?
Hirakata Yoshiharu, Yamazaki Shunpei, Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification C23C14/228. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Oct 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).