Active matrix substrate and liquid crystal display device
US-2024377690-A1 · Nov 14, 2024 · US
Manufacturing method of array substrate, array substrate, and display apparatus
US9147697B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9147697-B2 |
| Application number | US-201213806182-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 9, 2012 |
| Priority date | Nov 24, 2011 |
| Publication date | Sep 29, 2015 |
| Grant date | Sep 29, 2015 |
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- Title
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Abstract
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The present disclosure relates to an array substrate and the manufacturing method thereof, and a display apparatus. The manufacturing method of the array substrate comprises following step. A gate insulating layer and an active layer is formed on the substrate with said gate electrode and said common electrode formed thereon. A source drain layer is formed on the substrate with said gate insulating layer and said active layer formed thereon. A passivation layer is formed on the substrate with said source drain layer formed thereon, and a through hole is formed in the passivation layer; a pixel electrode is formed on the substrate with said passivation layer formed thereon with said through hole. The pixel electrode is connected to the drain electrode in the source drain layer through said through hole. The process for forming the pixel electrode comprises first etching, ashing and second etching.
First claim
Opening claim text (preview).
What is claimed is: 1. A manufacturing method of an array substrate, comprising steps of: forming a gate electrode and a common electrode on a substrate; forming a gate insulating layer and an active layer on said substrate with said gate electrode and said common electrode; forming a source/drain layer comprising a source and a drain on said substrate with said gate insulating layer and said active layer; forming a passivation layer on said substrate with said source/drain…
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Classifications
Electricity · mapped topic
Electricity · mapped topic
- H10D86/441Primary
Electricity · mapped topic
- H10D86/60Primary
Electricity · mapped topic
- H01L27/124Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9147697B2 cover?
- The present disclosure relates to an array substrate and the manufacturing method thereof, and a display apparatus. The manufacturing method of the array substrate comprises following step. A gate insulating layer and an active layer is formed on the substrate with said gate electrode and said common electrode formed thereon. A source drain layer is formed on the substrate with said gate insula…
- Who is the assignee on this patent?
- Boe Technology Group Co Ltd, Hefei Boe Optoelectronics Tech
- What technology area does this patent fall under?
- Primary CPC classification H10D86/441. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).