Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Semiconductor package
US9147643B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9147643-B2 |
| Application number | US-201414260415-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 24, 2014 |
| Priority date | Apr 26, 2013 |
| Publication date | Sep 29, 2015 |
| Grant date | Sep 29, 2015 |
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Abstract
Official abstract text for this publication.
Provided is a semiconductor package which may include a package substrate which includes a power supply region and an interconnection region around the power supply region, a plurality of ground terminals and a plurality of power terminals, which are disposed in the power supply region with a dielectric interposed between the ground terminals and the power terminals, wherein the ground terminals and the power terminals extend from a top surface of the package substrate to a bottom surface of the package substrate, and at least one semiconductor chip mounted on the package substrate, the semiconductor chip includes a plurality of ground pads which are commonly connected to a ground terminal of the ground terminals and a plurality of power pads which are commonly connected to a power terminal of the power terminals.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor package, comprising: a package substrate which comprises a power supply region and an interconnection region around the power supply region; a ground terminal and a power terminal which are disposed in the power supply region with a dielectric interposed between the ground terminal and the power terminal, wherein the ground terminal and the power terminal extend from a top surface of the package substrate to a bottom surface of the package…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9147643B2 cover?
- Provided is a semiconductor package which may include a package substrate which includes a power supply region and an interconnection region around the power supply region, a plurality of ground terminals and a plurality of power terminals, which are disposed in the power supply region with a dielectric interposed between the ground terminals and the power terminals, wherein the ground terminal…
- Who is the assignee on this patent?
- You Se-Ho, Lee Jinho, Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10W70/60. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).