Page buffer performing memory operation
US-2024274171-A1 · Aug 15, 2024 · US
Nonvolatile memory device, memory system having the same, external power controlling method thereof
US9147488B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9147488-B2 |
| Application number | US-201314061019-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 23, 2013 |
| Priority date | Jan 18, 2013 |
| Publication date | Sep 29, 2015 |
| Grant date | Sep 29, 2015 |
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Abstract
Official abstract text for this publication.
An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.
First claim
Opening claim text (preview).
What is claimed is: 1. An external power control method of a nonvolatile memory device, the nonvolatile memory device including an internal circuit, the internal circuit housing a memory cell array, the method comprising: determining whether to apply a second external voltage to a first node according to a drop in a first external voltage, the determining whether to apply the second voltage to the first node including, generating a detection signal when the first external voltage…
Assignees
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Classifications
- G11C16/30Primary
Physics · mapped topic
- G11C16/0483Primary
Physics · mapped topic
Physics · mapped topic
- G11C29/00Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9147488B2 cover?
- An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and di…
- Who is the assignee on this patent?
- Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G11C16/30. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).