Management of Memory Access by Processors through High Bandwidth Interconnects to Memory Sub-Systems
US-2024372621-A1 · Nov 7, 2024 · US
US9146366B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9146366-B2 |
| Application number | US-201213652254-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 15, 2012 |
| Priority date | Oct 15, 2012 |
| Publication date | Sep 29, 2015 |
| Grant date | Sep 29, 2015 |
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Latch mechanism for communication modules. In an example embodiment, a module latch mechanism includes a follower configured to be slidingly positioned relative to a housing and a driver configured to be rotatingly positioned relative to the housing. The follower includes a first arm configured to facilitate selective engagement of the housing with a host device. The follower may further include a fastening mechanism configured to facilitate selective engagement of the follower with the housing. The driver is configured to be positioned relative to the follower such that the driver urges the follower toward a first position relative to the housing as the driver is rotated from an unlatched position to a latched position.
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What is claimed is: 1. A module latch mechanism comprising: a follower slidingly positioned relative to a housing, the follower including: first and second arms that facilitate selective engagement of the housing with a host device and that are disposed on opposite sides of the housing, and a cross-piece that couples the first arm to the second and is disposed on a bottom of the housing, wherein the cross-piece includes a first portion of a fastening mechanism, the fastening me…
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