Circuit and Method for a High Common Mode Rejection Amplifier by Using a Digitally Controlled Gain Trim Circuit
US-2018097490-A1 · Apr 5, 2018 · US
US9136808B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136808-B2 |
| Application number | US-201313968027-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 15, 2013 |
| Priority date | Jan 24, 2013 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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A signal processing apparatus and method are disclosed. A common mode signal extraction unit is configured to extract a common mode signal from input signals inputted to a differential amplifier. A common mode signal adjustment unit is configured to adjust a gain and a phase of the common mode signal and to output the adjusted common mode signal to the differential amplifier. An optimal set determination unit is configured to determine an optimal gain and phase to be applied to the common mode signal based on an output signal from the differential amplifier.
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What is claimed is: 1. A signal processing apparatus, comprising: a common mode signal extraction unit configured to calculate a common mode signal from input signals inputted to a differential amplifier; a common mode signal adjustment unit configured to adaptively adjust a gain and a phase of the common mode signal and to output the adjusted common mode signal to the differential amplifier; and an optimal set determination unit configured to determine and store a substantial…
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