Nonvolatile memory device and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-9136394-B2
Application number	US-201213720123-A
Country	US
Kind code	B2
Filing date	Dec 19, 2012
Priority date	Aug 21, 2012
Publication date	Sep 15, 2015
Grant date	Sep 15, 2015

Abstract

This technology relates to a nonvolatile memory device and a method for fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode over a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each connected with the pipe channel layer and extended in a direction substantially perpendicular to the substrate, a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, and metal silicide layers configured to be in contact with the pipe connection gate electrode. The electric resistance of the pipe connection gate electrode may be greatly reduced without deteriorating the characteristics of the memory layers by forming the metal silicide layers coming in contact with the pipe connection gate electrode.

First claim

What is claimed is:

1. A method for fabricating a nonvolatile memory device, comprising:
forming a conductive layer for a gate electrode, that includes at least one or more sacrificial layer patterns, over a substrate;
forming at least one or more trenches by etching the conductive layer to a depth that does not fully penetrate the conductive layer, wherein the trenches are formed not to overlap with the sacrificial layer patterns;
forming spacers on sidewalls of the trenches;…

Assignees

• Sk Hynix Inc

Inventors

• Kim Min-Soo
• Lee Young-Jin
• Whang Sung-Jin

Classifications

• H10D30/69 Primary

  Electricity · mapped topic

• H10D30/0413 Primary

  Electricity · mapped topic

• H10D84/016

  Electricity · mapped topic

• H10D30/693

  Electricity · mapped topic

• H01L29/792 Primary

  Electricity · mapped topic