Integrated Assemblies Having Conductive Posts Extending Through Stacks of Alternating Materials
US-2024237336-A9 · Jul 11, 2024 · US
Semiconductor memory device and method for manufacturing the same
US9136392B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136392-B2 |
| Application number | US-201313971220-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 20, 2013 |
| Priority date | Aug 28, 2012 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
According to one embodiment, the underlying film includes a memory region including a first trench and a peripheral region including a second trench. The stacked body includes conductive layers and insulating layers alternately stacked on the underlying film. The channel body is provided in a pair of first holes and the first trench. The first holes pierce the stacked body to be connected to the first trench. The memory film includes a charge storage film provided between a side wall of the first hole and the channel body, and between an inner wall of the first trench and the channel body. The conductor is provided in a pair of second holes and the second trench. The second holes pierce the stacked body to be connected to the second trench.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor memory device comprising: an underlying film including a memory region and a peripheral region, the memory region including a first trench, the peripheral region including a second trench; a stacked body including a plurality of conductive layers and a plurality of insulating layers alternately stacked on the underlying film; a channel body provided in a pair of first holes and in the first trench, the pair of first holes piercing the sta…
Assignees
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Classifications
Electricity · mapped topic
- H10D30/0413Primary
Electricity · mapped topic
Electricity · mapped topic
- H10D30/68Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9136392B2 cover?
- According to one embodiment, the underlying film includes a memory region including a first trench and a peripheral region including a second trench. The stacked body includes conductive layers and insulating layers alternately stacked on the underlying film. The channel body is provided in a pair of first holes and the first trench. The first holes pierce the stacked body to be connected to th…
- Who is the assignee on this patent?
- Toshiba Kk
- What technology area does this patent fall under?
- Primary CPC classification H10D30/0413. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).