Semiconductor device

Patent metadata

Field	Value
Publication number	US-9136385-B2
Application number	US-201414180415-A
Country	US
Kind code	B2
Filing date	Feb 14, 2014
Priority date	Apr 27, 2001
Publication date	Sep 15, 2015
Grant date	Sep 15, 2015

Abstract

There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance ( 205 ) is provided between a gate and a source of a TFT ( 203 ) connected to an output node, and a circuit formed of TFTs ( 201 ) and ( 202 ) has a function to bring a node α into a floating state. When the node α is in the floating state, a potential of the node α is caused higher than VDD by using gate-source capacitance coupling of the TFT ( 203 ) through the capacitance ( 205 ), thus an output signal having an amplitude of VDD−GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.

First claim

What is claimed is:

1. A display device comprising:
a first transistor;
a second transistor;
a third transistor;
a fourth transistor;
a fifth transistor;
a sixth transistor;
a seventh transistor;
an eighth transistor;
a ninth transistor;
a tenth transistor;
an eleventh transistor; and
a twelfth transistor,
wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,
wherein…

Assignees

• Semiconductor Energy Lab

Inventors

• Azami Munehiro
• Nagao Shou
• Tanada Yoshifumi

Classifications

• H10D30/67 Primary

  Electricity · mapped topic

• H10D86/40 Primary

  Electricity · mapped topic

• H01L29/786 Primary

  Electricity · mapped topic

• H03K19/01721

  Electricity · mapped topic

• H03K19/01714 Primary

  Electricity · mapped topic