Semiconductor devices and methods for manufacturing the same
US-2015325703-A1 · Nov 12, 2015 · US
Native devices having improved device characteristics and methods for fabrication
US9136382B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136382-B2 |
| Application number | US-201313974103-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 23, 2013 |
| Priority date | Apr 29, 2010 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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Abstract
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A method for fabricating a native device is presented. The method includes forming a gate structure over a substrate starting at an outer edge of an inner marker region, where the gate structure extends in a longitudinal direction, and performing MDD implants, where each implant is performed using a different orientation with respect to the gate structure, performing pocket implants, where each implant is performed using a different orientation with respect to the gate structure, and concentrations of the pocket implants vary based upon the orientations. A transistor fabricated as a native device, is presented, which includes an inner marker region, an active outer region which surrounds the inner marker region, a gate structure coupled to the inner marker region, and first and second source/drain implants located within the active outer region and interposed between the first source/drain implant and the second source/drain implant.
First claim
Opening claim text (preview).
What is claimed is: 1. A transistor fabricated as a native device, comprising: an inner marker region; an active outer region which surrounds the inner marker region; a gate structure having a central portion over the inner marker region and a first end portion and a second end portion projecting from the inner marker region over the active outer region, the gate structure extending in a longitudinal direction; a first medium doped drain implant having a first orientation th…
Assignees
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Classifications
- H10P30/222Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9136382B2 cover?
- A method for fabricating a native device is presented. The method includes forming a gate structure over a substrate starting at an outer edge of an inner marker region, where the gate structure extends in a longitudinal direction, and performing MDD implants, where each implant is performed using a different orientation with respect to the gate structure, performing pocket implants, where each…
- Who is the assignee on this patent?
- Qualcomm Inc
- What technology area does this patent fall under?
- Primary CPC classification H10P30/222. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).