Power mosfet and manufacturing method thereof
US-2024322032-A1 · Sep 26, 2024 · US
Semiconductor device
US9136333B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136333-B2 |
| Application number | US-201213352415-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 18, 2012 |
| Priority date | Jul 14, 2006 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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- Title
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Abstract
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A semiconductor device includes: a semiconductor substrate; a vertical type trench gate MOS transistor; a Schottky barrier diode; multiple trenches having a stripe pattern to divide an inner region into first and second separation regions; and a poly silicon film in each trench. The first separation region includes a first conductive type region for providing a source and a second conductive type layer for providing a channel region. The first conductive type region is adjacent to a first trench. The poly silicon film in the first trench is coupled with a gate wiring. A second trench is not adjacent to the first conductive type region. The poly silicon film in the second trench is coupled with a source or gate wiring. The substrate in the second separation region is coupled with the source wiring for providing a Schottky barrier.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a semiconductor substrate having a first conductive type, wherein the semiconductor substrate includes a first surface and a second surface opposite to the first surface, and the semiconductor substrate has a first portion and a second portion; a drift layer having the first conductive type, wherein the drift layer is disposed in a surface portion of the first surface of the semiconductor substrate; a vertical MOSFET di…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9136333B2 cover?
- A semiconductor device includes: a semiconductor substrate; a vertical type trench gate MOS transistor; a Schottky barrier diode; multiple trenches having a stripe pattern to divide an inner region into first and second separation regions; and a poly silicon film in each trench. The first separation region includes a first conductive type region for providing a source and a second conductive ty…
- Who is the assignee on this patent?
- Aoki Takaaki, Shiga Tomofusa, Denso Corp
- What technology area does this patent fall under?
- Primary CPC classification H10D30/668. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).