Solid-state imaging device having penetration electrode formed in semiconductor substrate

US9136291B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9136291-B2
Application numberUS-201213490768-A
CountryUS
Kind codeB2
Filing dateJun 7, 2012
Priority dateFeb 13, 2009
Publication dateSep 15, 2015
Grant dateSep 15, 2015

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Abstract

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A solid-state imaging device includes an imaging element, an external terminal, an insulating film, a penetration electrode, a first insulating interlayer, a first electrode, and a first contact plug. The imaging element is formed on a first main surface of a semiconductor substrate. The external terminal is formed on a second main surface facing the first main surface of the substrate. The insulating film is formed in a through-hole formed in the substrate. The penetration electrode is formed on the insulating film in the through-hole and electrically connected to the external terminal. The first insulating interlayer is formed on the first main surface of the substrate and the penetration electrode. The first electrode is formed on the first insulating interlayer. The first contact plug is formed in the first insulating interlayer between the penetration electrode and the first electrode to electrically connect the penetration electrode and the first electrode.

First claim

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What is claimed is: 1. A method of manufacturing a solid-state imaging device comprising: forming an imaging element on a first main surface of a semiconductor substrate; forming a first insulating interlayer on the first main surface of the semiconductor substrate; forming a first contact plug in the first insulating interlayer; forming a first electrode on the first insulating interlayer and first contact plug; forming a through-hole from a second main surface of the sem…

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What does patent US9136291B2 cover?
A solid-state imaging device includes an imaging element, an external terminal, an insulating film, a penetration electrode, a first insulating interlayer, a first electrode, and a first contact plug. The imaging element is formed on a first main surface of a semiconductor substrate. The external terminal is formed on a second main surface facing the first main surface of the substrate. The ins…
Who is the assignee on this patent?
Saito Mariko, Inoue Ikuko, Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10F39/804. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).