Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US9136249B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136249-B2 |
| Application number | US-201213367918-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 7, 2012 |
| Priority date | Oct 21, 2011 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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A stacked semiconductor package includes a first semiconductor chip having one surface, and an other surface which faces away from the one surface, and first through electrodes which pass through the one surface and the other surface and project out of the other surface; a second semiconductor chip stacked over the one surface of the first semiconductor chip and having second through electrodes which are connected with the first through electrodes; a heat dissipation member disposed over the second semiconductor chip; and a first heat absorbing member disposed to face the other surface of the first semiconductor chip and defined with through holes into which projecting portions of the first through electrodes are inserted.
Opening claim text (preview).
What is claimed is: 1. A stacked semiconductor package comprising: a first semiconductor chip having one surface, and another surface which faces away from the one surface, a first circuit unit, a plurality of first through electrodes which pass through the one surface and the other surface and project out of the other surface; a second semiconductor chip stacked over the one surface of the first semiconductor chip and having second through electrodes which are connected with th…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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