Stacked semiconductor package

US9136249B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9136249-B2
Application numberUS-201213367918-A
CountryUS
Kind codeB2
Filing dateFeb 7, 2012
Priority dateOct 21, 2011
Publication dateSep 15, 2015
Grant dateSep 15, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A stacked semiconductor package includes a first semiconductor chip having one surface, and an other surface which faces away from the one surface, and first through electrodes which pass through the one surface and the other surface and project out of the other surface; a second semiconductor chip stacked over the one surface of the first semiconductor chip and having second through electrodes which are connected with the first through electrodes; a heat dissipation member disposed over the second semiconductor chip; and a first heat absorbing member disposed to face the other surface of the first semiconductor chip and defined with through holes into which projecting portions of the first through electrodes are inserted.

First claim

Opening claim text (preview).

What is claimed is: 1. A stacked semiconductor package comprising: a first semiconductor chip having one surface, and another surface which faces away from the one surface, a first circuit unit, a plurality of first through electrodes which pass through the one surface and the other surface and project out of the other surface; a second semiconductor chip stacked over the one surface of the first semiconductor chip and having second through electrodes which are connected with th…

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What does patent US9136249B2 cover?
A stacked semiconductor package includes a first semiconductor chip having one surface, and an other surface which faces away from the one surface, and first through electrodes which pass through the one surface and the other surface and project out of the other surface; a second semiconductor chip stacked over the one surface of the first semiconductor chip and having second through electrodes…
Who is the assignee on this patent?
Kim Taek Joong, Lee Jin Hui, Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).