Electronic package module and method for fabrication of the same
US-2024413067-A1 · Dec 12, 2024 · US
Method of manufacturing semiconductor device and method of manufacturing electronic assembly
US9136172B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136172-B2 |
| Application number | US-201313747883-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 23, 2013 |
| Priority date | Feb 16, 2012 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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Abstract
Official abstract text for this publication.
A method of manufacturing a semiconductor device, includes: providing an adhesive layer on a support body; providing a semiconductor element on the adhesive layer; providing a resin layer on the adhesive layer, the semiconductor element being provided on the adhesive layer, and forming a substrate on the adhesive layer, the substrate including the semiconductor element and the resin layer; and removing the substrate from the adhesive layer, wherein an adhesive force of the adhesive layer in a direction in which the substrate is removed is less than an adhesive force of the adhesive layer in a planar direction in which the substrate is formed.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of manufacturing a semiconductor device, the method comprising: providing an adhesive layer on a support body; providing a semiconductor element on the adhesive layer; providing a resin layer on the adhesive layer, the semiconductor element being provided on the adhesive layer, and forming a substrate on the adhesive layer, the substrate including the semiconductor element and the resin layer; and removing the substrate from the adhesive layer…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9136172B2 cover?
- A method of manufacturing a semiconductor device, includes: providing an adhesive layer on a support body; providing a semiconductor element on the adhesive layer; providing a resin layer on the adhesive layer, the semiconductor element being provided on the adhesive layer, and forming a substrate on the adhesive layer, the substrate including the semiconductor element and the resin layer; and …
- Who is the assignee on this patent?
- Fujitsu Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10W74/019. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).