Semiconductor memory device and method of operating the same

Patent metadata

Field	Value
Publication number	US-9129682-B2
Application number	US-201213601181-A
Country	US
Kind code	B2
Filing date	Aug 31, 2012
Priority date	Dec 20, 2011
Publication date	Sep 8, 2015
Grant date	Sep 8, 2015

Abstract

In a semiconductor memory device and a method of operating the same, a memory block including memory cells is divided into memory groups. A level of bit line voltage applied to a bit line coupled to the memory cells included in each of the memory groups varies according to a distance between a row decoder and each memory groups during a program operation. Characteristics of the threshold voltage distribution of the memory cells in the semiconductor memory device may be improved without deteriorating performance of the program.

First claim

What is claimed is:

1. A semiconductor memory device comprising:
a memory block having memory groups, each including cell strings coupled to word lines;
a row decoder configured to apply a program voltage to a selected word line during a program operation; and
a bit line voltage supply circuit configured to apply different bit line voltages into bit lines coupled to program target cells of the selected word line using different reference voltages,
wherein levels of the refer…

Assignees

• Leem Jong Soon
• Sk Hynix Inc

Inventors

• Leem Jong Soon

Classifications

• G11C16/24

  Physics · mapped topic

• G11C16/10 Primary

  Physics · mapped topic

• G11C16/12

  Physics · mapped topic

• G11C16/06 Primary

  Physics · mapped topic

• G11C16/34

  Physics · mapped topic