Method, mobile terminal and computer program product for sharing storage device

Patent metadata

Field	Value
Publication number	US-9128891-B2
Application number	US-201013260463-A
Country	US
Kind code	B2
Filing date	Mar 10, 2010
Priority date	Mar 25, 2009
Publication date	Sep 8, 2015
Grant date	Sep 8, 2015

Abstract

The invention discloses a method of sharing a storage device and a mobile terminal. The mobile terminal comprises a first processor, a second processor and a readable and writable nonvolatile storage device. A processing capacity of the first processor is different from that of the second processor. A state in which the first processor is operating and using the storage device is a second state. A state in which the second processor is operating and using the storage device is a third state. The method comprising: the first processor receiving a switch instruction; the first processor controlling the storage device to enter the second state or the third state according to the switch instruction. As compared with the prior art, by controlling the sharing of the storage device by the first processor, the invention reduces the elements in the mobile terminal and saves the hardware cost of the mobile terminal; moreover, the physical connection between the components in the mobile terminal is simple and easily controlled.

First claim

What is claimed is:

1. A method of sharing a memory device, applicable to a mobile terminal comprising a first processor, a second processor, a switch circuit and a readable and writable nonvolatile memory device, wherein a processing capacity of the first processor is different from that of the second processor, the method comprising:
in a case that the mobile terminal is initially powered on, the mobile terminal is in a first state in which the memory is connected to the first processor by default, and the first processor is not using the memory; or
in a case that the first processor needs to use the memory in the first state, a control signal is transmitted to the memory to control the memory to be powered up, to switch the mobile terminal into a second state, in which the first processor accesses the memory as a host end; or
in a case that the second processor needs to use the memory in the second state, the first processor establishes a direct connection channel between the second processor and the memory, and the first processor transmit the control signal to the memory to control the memory to be powered down firstly and then powered up to switch the mobile terminal into a third state, in which the second processor accesses the memory via the direct connection channel as the host end; or
in a case that the first processor or the second processor does not need to use the memory in the third state, the first processor disconnects the direction connection between the second processor and the first processor transmits the control signal to the memory to control the memory to be powered down, to switch the mobile terminal into the memory to switch into the first state; or
in a case that the second processor needs to use the memory in the first state, the first processor establishes the direct connection between the second processor and the memory and the first processor transmits the control signal to the memory to control the memory to be powered up, to switch the mobile terminal into the third state; or
in a case that the first processor needs to use the memory in the third state, the first processor disconnects the direction connection between the second processor and the memory, and the first processor transmits the control signal to the memory and control the memory to be powered down firstly and then powered up, to switch the mobile terminal into the second state; or
in a case that the first processor does not need to use the memory, the first processor transmits the control signal to the memory to control the memory to be powered down, to switch the mobile terminal into the first state.

2. The method according to claim 1 , wherein the first processor is an ARM processor.

3. The method according to claim 1 , wherein the second processor is an X86 processor.

4. The method according to claim 1 , wherein the memory is a USB hard disk.

5. A mobile terminal comprising:
a first processor;
a second processor;
a switch circuit; and
a readable and writable nonvolatile memory device, wherein a processing capacity of the first processor is different from that of the second processor;
in a case that the mobile terminal is initially powered on, the mobile terminal is in a first state in which the memory is connected to the first processor by default, and the first processor is not using the memory; or
in a case that the first processor needs to use the memory in the first state, a control signal is transmitted to the memory to control the memory to be powered up, to switch the mobile terminal into a second state, in which the first processor accesses the memory as a host end; or
in a case that the second processor needs to use the memory in the second state, the first processor establishes a direct connection channel between the second processor and the memory, and the first processor transmit the control signal to the memory to control the memory to be powered down firstly and then powered up to switch the mobile terminal into a third state, in which the second processor accesses the memory via the direct connection channel as the host end; or
in a case that the first processor or the second processor does not need to use the memory in the third state, the first processor disconnects the direction connection between the second processor and the first processor transmits the control signal to the memory to control the memory to be powered down, to switch the mobile terminal into the memory to switch into the first state; or
in a case that the second processor needs to use the memory in the first state, the first processor establishes the direct connection between the second processor and the memory and the first processor transmits the control signal to the memory to control the memory to be powered up, to switch the mobile terminal into the third state; or
in a case that the first processor needs to use the memory in the third state, the first processor disconnects the direction connection between the second processor and the memory, and the first processor transmits the control signal to the memory and control the memory to be powered down firstly and then powered up, to switch the mobile terminal into the second state; or
in a case that the first processor does not need to use the memory, the first processor transmits the control signal to the memory to control the memory to be powered down, to switch the mobile terminal into the first state.

6. The mobile terminal according to claim 5 , wherein the first processor is an ARM processor.

7. The mobile terminal according to claim 5 , wherein the second processor is an X86 processor.

8. The mobile terminal according to claim 5 , wherein the memory is a USB hard disk.

9. A computer readable non-transitory storage media embodying software, which, when being executed by a processor of a computer, performs the method according to claim 1 .

Assignees

• Zhang Fuliang
• Shan Wenying
• Sun Chunhui
• Yang Jinmei
• Lenovo Beijing Co Ltd

Inventors

• Zhang Fuliang
• Shan Wenying
• Sun Chunhui
• Yang Jinmei

Classifications

• G06F15/167 Primary

  using a common memory, e.g. mailbox · CPC title

• G06F1/3293

  by switching to a less power-consuming processor, e.g. sub-CPU · CPC title

• Y02B60/121

  Cross-Sectional Technologies · mapped topic

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title